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数模转换器 (DAC)
精密 DAC (≤10 MSPS)

DAC8802

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14 位双通道串行接口乘法数模转换器

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数据表

DAC8802

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产品详情

Resolution (Bits) 14 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
Resolution (Bits) 14 Number of DAC channels 2 Interface type SPI Output type Unbuffered Current INL (max) (±LSB) 1 Settling time (µs) 0.5 Reference type Ext Architecture Multiplying DAC Rating Catalog Features Reset to Mid-Scale Sample/update rate (Msps) 2 Power consumption (typ) (mW) 0.025 Operating temperature range (°C) -40 to 85
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm)
  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%, with VREF = ±10 V
  • 0.5 µs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: -105 dB THD
  • SPI™-Compatible 3-Wire Interface: 50 MHz
  • Double Buffered Registers to Enable Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Automatic Test Equipment
    • Instrumentation
    • Digitally Controlled Calibration

SPI is a trademark of Motorola, Inc.
All other trademarks are the property of their respective owners.
  • Relative Accuracy: 1 LSB Max
  • Differential Nonlinearity: 1 LSB Max
  • 2-mA Full-Scale Current ±20%, with VREF = ±10 V
  • 0.5 µs Settling Time
  • Midscale or Zero-Scale Reset
  • Separate 4Q Multiplying Reference Inputs
  • Reference Bandwidth: 10 MHz
  • Reference Dynamics: -105 dB THD
  • SPI™-Compatible 3-Wire Interface: 50 MHz
  • Double Buffered Registers to Enable Simultaneous Multichannel Update
  • Internal Power-On Reset
  • Industry-Standard Pin Configuration
  • APPLICATIONS
    • Automatic Test Equipment
    • Instrumentation
    • Digitally Controlled Calibration

SPI is a trademark of Motorola, Inc.
All other trademarks are the property of their respective owners.

The DAC8802 is a dual, 14-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7 V to 5.5 V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A doubled-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

The DAC8802 is available in an TSSOP-16 package.

The DAC8802 is a dual, 14-bit, current-output digital-to-analog converter (DAC) designed to operate from a single 2.7 V to 5.5 V supply.

The applied external reference input voltage VREF determines the full-scale output current. An internal feedback resistor (RFB) provides temperature tracking for the full-scale output when combined with an external I-to-V precision amplifier.

A doubled-buffered, serial data interface offers high-speed, 3-wire, SPI and microcontroller compatible inputs using serial data in (SDI), clock (CLK), and a chip-select (CS). A common level-sensitive load DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

The DAC8802 is available in an TSSOP-16 package.
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* 数据表 Dual, Serial Input 14-Bit Multiplying Digital-to-Analog Converter 数据表 (Rev. B) 2007-2-19

设计与开发

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仿真模型

DAC8802 IBIS Model

SBAM061.ZIP (15 KB) - IBIS 模型
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设计工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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参考设计

TIDA-01427 — 适用于超声波的 2.3nV/√Hz、时间增益控制 (TGC) 差分 DAC 参考设计

TIDA-01427 参考设计提供一个差分信号链解决方案，用于生成时变控制电压 (VCNTL)，以驱动并联配置中的多个 AFE 器件。TI 低噪声模拟前端 (AFE) 适于医用超声应用，具有时间增益控制 (TGC) 功能，该功能有助于面向超声应用实现出色信噪比 (SNR)。该参考设计使用双通道乘法型 DAC (DAC8802) 与电流电压转换器 (OPA2209)，以生成 20V 的摆幅。在使用多反馈滤波器 (THS4130) 对该 20V 摆幅进行滤波之后，使用无源衰减器将其衰减至 1.5V。该设计可以使用 ±15V 或 5V 电源供电（板载 Fly-Buck 转换器 LM5160 可将 (...)
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封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (PW) 16 Ultra Librarian
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