主页 逻辑和电压转换 触发器、锁存器和寄存器 计数器
主页
逻辑和电压转换
触发器、锁存器和寄存器
计数器

CY74FCT163T

正在供货

同步 4 位二进制计数器

立即订购
数据表
用户指南

CY74FCT163T

正在供货
数据表 立即订购

产品详情

Function Counter Bits (#) 4 Technology family FCT Input type TTL, TTL-Compatible CMOS Output type CMOS, Push-Pull Features Partial power down (Ioff), Ultra high speed (tpd <5ns) Operating temperature range (°C) -40 to 85 Rating Catalog
Function Counter Bits (#) 4 Technology family FCT Input type TTL, TTL-Compatible CMOS Output type CMOS, Push-Pull Features Partial power down (Ioff), Ultra high speed (tpd <5ns) Operating temperature range (°C) -40 to 85 Rating Catalog
SSOP (DBQ) 16 29.4 mm² (4.9 mm × 6 mm) SOIC (DW) 16 106.09 mm² (10.3 mm × 10.3 mm)
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • CY54FCT163T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT163T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • CY54FCT163T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT163T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

The \x92FCT163T devices are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers. These devices have two types of count-enable (CEP and CET) inputs, plus a terminal-count (TC) output for versatility in forming synchronous multistaged counters. The \x92FCT163T devices have a synchronous-reset (SR\) input that overrides counting and parallel loading, and allows the outputs to be reset simultaneously on the rising edge of the clock.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT163T devices are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers. These devices have two types of count-enable (CEP and CET) inputs, plus a terminal-count (TC) output for versatility in forming synchronous multistaged counters. The \x92FCT163T devices have a synchronous-reset (SR\) input that overrides counting and parallel loading, and allows the outputs to be reset simultaneously on the rising edge of the clock.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
filter 查找其他 计数器
下载 观看带字幕的视频 视频

技术文档

未找到结果。请清除搜索并重试。
查看全部 2
顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 4-Bit Binary Counters 数据表 (Rev. A) 2001-10-1
* 用户指南 CYFCT Parameter Measurement Information 2001-4-2

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

评估板

14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑产品通用评估模块

14-24-LOGIC-EVM 评估模块 (EVM) 设计用于支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

用户指南: PDF | HTML
支持的产品和硬件
有库存
限制：
??asset.out-of-stock-ti_zh_CN??
无货
封装 引脚 CAD 符号、封装和 3D 模型
SSOP (DBQ) 16 Ultra Librarian
SOIC (DW) 16 Ultra Librarian
适用于评估类项目的 TI 标准条款与条件。

订购和质量

支持和培训

视频