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D 型锁存器

CY54FCT374T

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具有三态输出的八路 D 类寄存器

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CY54FCT374T

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产品详情

Number of channels 8 Technology family FCT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 70 IOL (max) (mA) 64 IOH (max) (mA) -32 Supply current (max) (µA) 200 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family FCT Input type TTL-Compatible CMOS Output type 3-State Clock frequency (max) (MHz) 70 IOL (max) (mA) 64 IOH (max) (mA) -32 Supply current (max) (µA) 200 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm² (— mm × — mm) LCCC (FK) 20 79.0321 mm² (— mm × — mm)
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Edge-Triggered D-Type Inputs
  • 250-MHz Typical Switching Rate
  • CY54FCT374T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT374T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • 3-State Outputs
  • Function, Pinout, and Drive Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Edge-Triggered D-Type Inputs
  • 250-MHz Typical Switching Rate
  • CY54FCT374T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT374T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current
  • 3-State Outputs

The \x92FCT374T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The eight flip-flops in the \x92FCT374T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT374T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The eight flip-flops in the \x92FCT374T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 8-Bit Registers With 3-State Outputs 数据表 (Rev. A) 2001-10-1
* 用户指南 CYFCT Parameter Measurement Information 2001-4-2
* SMD CY54FCT374T SMD 5962-92218 2016-6-21
应用手册 Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022-12-15

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封装 引脚 CAD 符号、封装和 3D 模型
CDIP (J) 20 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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