CY54FCT138T
- Function, Pinout, and Drive Compatible With FCT and F Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- Fully Compatible With TTL Input and Output Logic Levels
- Dual 1-of-8 Decoder With Enables
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- CY54FCT138T
- 32-mA Output Sink Current
- 12-mA Output Source Current
- CY74FCT138T
- 64-mA Output Sink Current
- 32-mA Output Source Current
The \x92FCT138T devices are 1-of-8 decoders. These devices accept three binary weighted inputs (A0, A1, A2) and, when enabled, provide eight mutually exclusive active-low outputs (O\0\x96O\7). The \x92FCT138T devices feature three enable inputs: two active low (E\1, E\2) and one active high (E3 ).
All outputs are high unless E\1 and E\2 are low and E3 is high. This multiple-enable function allows easy parallel expansion of the device to a 1-of-32 (five lines to 32 lines) decoder with just four \x92FCT138T devices and one inverter.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 1-of-8 Decoders 数据表 (Rev. B) | 2001-10-15 | |||
| * | 用户指南 | CYFCT Parameter Measurement Information | 2001-4-2 | |||
| * | SMD | CY54FCT138T SMD 5962-92233 | 2016-6-21 |
设计与开发
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| CDIP (J) | 16 | Ultra Librarian |
| LCCC (FK) | 20 | Ultra Librarian |