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CD54HC175

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具有复位功能的高速 CMOS 逻辑四路 D 型触发器

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CD54HC175

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产品详情

Number of channels 4 Technology family HC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 23 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 4 Technology family HC Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 23 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 160 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² (— mm × — mm)
  • Common Clock and Asynchronous Reset on Four D-Type Flip-Flops
  • Positive Edge Pulse Triggering
  • Complementary Outputs
  • Buffered Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH
  • Common Clock and Asynchronous Reset on Four D-Type Flip-Flops
  • Positive Edge Pulse Triggering
  • Complementary Outputs
  • Buffered Inputs
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . -55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.

Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.

The ’HC175 and ’HCT175 are high speed Quad D-type Flip-Flops with individual D-inputs and Q, Q\ complementary outputs. The devices are fabricated using silicon gate CMOS technology. They have the low power consumption advantage of standard CMOS ICs and the ability to drive 10 LSTTL devices.

Information at the D input is transferred to the Q, Q\ outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR\). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q\ outputs to a logic 1.
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* 数据表 CD54HC175, CD74HC175, CD54HCT175, CD74HCT175 数据表 (Rev. C) 2003-10-13

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