可提供此产品的更新版本
功能与比较器件相似。
ADS900
- +2.7V TO +3.7V SUPPLY OPERATION
- INTERNAL REFERENCE
- LOW POWER: 52mW at +3V
- SINGLE-ENDED INPUT RANGE: 1V to 2V
- WIDEBAND TRACK/HOLD: 350MHz
- SSOP-28 PACKAGE
- APPLICATIONS
- PORTABLE INSTRUMENTATION
- IF AND BASEBAND COMMUNICATIONS
- CABLE MODEMS
- SET-TOP BOXES
- PORTABLE TEST EQUIPMENT
- COMPUTER SCANNERS
The ADS900 is a high-speed pipelined Analog-to-Digital Converter (ADC). This complete converter includes a high bandwidth track-and-hold, a 10-bit quantizer, and an internal reference.
The ADS900 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for telecommunications, video and test instrumentation applications.
This high-performance ADC is specified for performance at a 20MHz sampling rate. The ADS900 is available in an SSOP-28 package.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADS900: SpeedPlus? 10-Bit, 20MHz, +3V Supply Analog-To-Digital Converter 数据表 (Rev. A) | 2001-2-23 | |||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010-9-10 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009-4-28 | ||||
| 应用手册 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008-9-4 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008-6-8 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008-6-2 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |