ADS8327
- 2.7-V to 5.5-V Analog Supply, Low Power:
- 10.6 mW (500 kHz, +VA = 2.7 V,
+VBD = 1.8 V)
- 10.6 mW (500 kHz, +VA = 2.7 V,
- 500-kHz Sampling Rate
- Excellent DC Performance
- ±1.5 LSB Typ, ±2 LSB Max INL
- ±0.6 LSB Typ, ±1 LSB Max DNL
- 16-Bit NMC Over Temperature
- ±0.5 mV Max Offset Error at 2.7 V
- ±1 mV Max Offset Error at 5 V
- Excellent AC Performance at fI = 10 kHz with 91 dB SNR, 100 dB SFDR, –96 dB THD
- Built-In Conversion Clock (CCLK)
- 1.65 V to 1.5×(+VA) I/O Supply
- SPI/DSP Compatible Serial
- SCLK up to 50 MHz
- Comprehensive Power-Down Modes:
- Deep Power-Down
- Nap Power-Down
- Auto Nap Power-Down
- Unipolar Input Range: 0 V to VREF
- Software Reset
- Global CONVST (Independent of CS)
- Programmable Status/Polarity EOC/INT
- 16-Pin 4×4 QFN or 16-Pin TSSOP Packages
- Multi-Chip Daisy Chain Mode
- Programmable TAG Bit Output
- Auto/Manual Channel Select Mode
- Communications
- Transducer Interface
- Medical Instruments
- Magnetometers
- Industrial Process Control
- Data Acquisition Systems
- Automatic Test Equipment
The ADS8327 is a low power, 16-bit, 500-kSPS analog-to-digital converter with a unipolar input. The device includes a 16-bit capacitor-based SAR A/D converter with inherent sample and hold.
The ADS8328 is based on the same core and includes a 2-to-1 input MUX with programmable option of TAG bit output. Both the ADS8327 and ADS8328 offer a high-speed, wide voltage serial interface and are capable of chain mode operation when multiple converters are used.
These converters are available in a 16-lead TSSOP or 4×4 QFN packages and are fully specified for operation over the industrial –40°C to +85°C temperature range.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | Low Power, 16-Bit, 500-kHz, Single/Dual Unipolar Input, ADC w/Serial I/F 数据表 (Rev. E) | 2011-1-27 | |||
| 白皮书 | Voltage-reference impact on total harmonic distortion | 2016-8-1 | ||||
| 电子书 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015-5-21 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011-3-17 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010-11-10 | ||||
| 应用手册 | Using the ADS8327 with the TMS320C6713 DSP | 2006-12-18 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VQFN (RSA) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
订购和质量
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