ADS8319
- 500-kHz Sample Rate
- 16-Bit Resolution
- Zero Latency at Full Speed
- Unipolar, Single-Ended Input Range: 0 V to VREF
- SPI-Compatible Serial Interface With Daisy-Chain Option
- Excellent Performance:
- 93.6-dB SNR (Typical) at 10-kHz Input
- –106-dB THD (Typical) at 10-kHz Input
- ±1.5-LSB (Maximum) INL
- ±1-LSB (Maximum) DNL
- Low Power Dissipation: 18 mW (Typical) at 500 kSPS
- Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
- Power Dissipation During Power-Down State: 0.25 µW (Typical)
- 10-Pin VSSOP and VSON Packages
The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.
The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.
The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.
Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADS8319 16-Bit, 500-kSPS, Serial Interface, Micropower, Miniature, SAR Analog-to-Digital Converter 数据表 (Rev. C) | PDF | HTML | 2016-12-9 | ||
| 电路设计 | 用于保护低压 SAR ADC 免受电过应力且对性能影响超低的电 路 (Rev. A) | PDF | HTML | 英语版 (Rev.A) | PDF | HTML | 2024-10-3 | |
| 电路设计 | 采用固定截止频率的单端 ADC 输入的抗混叠滤波器电路设计 (Rev. B) | PDF | HTML | 英语版 (Rev.B) | PDF | HTML | 2024-10-2 | |
| 白皮书 | Voltage-reference impact on total harmonic distortion | 2016-8-1 | ||||
| 更多文献资料 | SAR ADCs for PLC Applications | PDF | HTML | 2016-2-11 | |||
| 电子书 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015-5-21 | ||||
| 模拟设计期刊 | IBIS 模型（第 2 部分）：决定 IBIS 模型 的全面质量 | 英语版 | 2011-5-11 | |||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011-3-17 | ||||
| 应用手册 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010-11-10 | ||||
| 应用手册 | Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319 | 2009-6-24 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
SBAC197 — Source Files for SBAA282
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VSSOP (DGS) | 10 | Ultra Librarian |
| VSON (DRC) | 10 | Ultra Librarian |
订购和质量
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