ADS5522
- 12-Bit Resolution
- 80 MSPS Sample Rate
- High SNR: 69.7 dBFS at 100 MHz fIN
- High SFDR: 83 dBc at 100 MHz fIN
- 2.3-VPP Differential Input Voltage
- Internal Voltage Reference
- 3.3-V Single-Supply Voltage
- Analog Power Dissipation: 541 mW
- Serial Programming Interface
- TQFP-64 PowerPAD™ Package
- Recommended Op Amps:
OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001 - APPLICATIONS
- Wireless Communication
- Communication Receivers
- Base Station Infrastructure
- Test and Measurement Instrumentation
- Single and Multichannel Digital Receivers
- Communication Instrumentation
- Radar, Infrared
- Video and Imaging
- Medical Equipment
- Wireless Communication
PowerPAD is a trademark of Texas Instruments.
The ADS5522 is a high-performance, 12-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5522 has excellent power consumption of 541 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.
The ADS5522 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 12-Bit, 80MSPS Analog-to-Digital Converter 数据表 (Rev. C) | 2007-2-8 | |||
| 应用手册 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015-5-22 | ||||
| 应用手册 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013-7-19 | ||||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010-9-10 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009-4-28 | ||||
| 应用手册 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008-9-4 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008-6-8 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008-6-2 | ||||
| 用户指南 | ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output | 2006-7-26 | ||||
| 模拟设计期刊 | Clocking High-Speed Data Converters | 2005-1-18 |
设计与开发
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
HSADC-SPI-UTILITY — ADS5400 EVM GUI
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。
除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| HTQFP (PAP) | 64 | Ultra Librarian |
订购和质量
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