可提供此产品的更新版本
功能与比较器件相同但引脚有所不同。
ADC08100
- Single-ended Input
- Internal Sample-and-hold Function
- Low Voltage (Single +3V) Operation
- Small Package
- Power-down Feature
Key Specifications
- Resolution 8 bits
- Maximum Sampling Frequency 100 Msps (Min)
- DNL 0.4 LSB (Typ)
- ENOB 7.4 Bits (Typ) at fIN = 41 MHz
- THD –60 dB (Typ)
- Power
Consumption
- Operating 1.3 mW/Msps (Typ)
- Power Down: 1 mW (Typ)
All trademarks are the property of their respective owners.
The ADC08100 is a low-power, 8-bit, monolithic analog-to-digital converter with an on-chip track-and-hold circuit. Optimized for low cost, low power, small size and ease of use, this product operates at conversion rates of 20 Msps to 100 Msps with outstanding dynamic performance over its full operating range while consuming just 1.3 mW per MHz of clock frequency. That's just 130 mW of power at 100 Msps. Raising the PD pin puts the ADC08100 into a Power Down mode where it consumes just 1 mW.
The unique architecture achieves 7.4 Effective Bits with 41 MHz input frequency. The excellent DC and AC characteristics of this device, together with its low power consumption and single +3V supply operation, make it ideally suited for many imaging and communications applications, including use in portable equipment. Furthermore, the ADC08100 is resistant to latch-up and the outputs are short-circuit proof. The top and bottom of the ADC08100's reference ladder are available for connections, enabling a wide range of input possibilities. The digital outputs are TTL/CMOS compatible with a separate output power supply pin to support interfacing with 3V or 2.5V logic. The digital inputs (CLK and PD) are TTL/CMOS compatible. The output format is straight binary
The ADC08100 is offered in a 24-lead plastic package (TSSOP) and is specified over the industrial temperature range of −40°C to +85°C.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADC08100 8-Bit, 20 Msps to 100 Msps, 1.3 mW/Msps A/D Converter 数据表 (Rev. I) | 2013-5-2 | |||
| 白皮书 | Easing the ADC Selection Process | 2001-3-1 |
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| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| TSSOP (PW) | 24 | Ultra Librarian |