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Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating Catalog Operating temperature range (°C) -40 to 85
Number of channels 8 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type CMOS Output type CMOS Features Balanced outputs, Positive input clamp diode, Very high speed (tpd 5-10ns) Technology family AC Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (DW) 24 159.65 mm² (15.5 mm × 10.3 mm)
  • 3-State Outputs Drive Bus Lines Directly
  • Flow-Through Architecture Optimizes PCB Layout
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (NT)

 

EPIC is a trademark of Texas Instruments Incorporated.

  • 3-State Outputs Drive Bus Lines Directly
  • Flow-Through Architecture Optimizes PCB Layout
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (NT)

 

EPIC is a trademark of Texas Instruments Incorporated.

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The device allows noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable input can be used to disable the device so that the buses are effectively isolated.

The 74AC11245 is characterized for operation from -40°C to 85°C.

 

 

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The device allows noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable input can be used to disable the device so that the buses are effectively isolated.

The 74AC11245 is characterized for operation from -40°C to 85°C.

 

 

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* 数据表 Octal Bus Transceiver With 3-State Outputs 数据表 (Rev. B) 1996-4-1

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