홈 전력 관리 DDR 메모리 전원 IC
홈
전력 관리
DDR 메모리 전원 IC

TPS7H3301-SP

활성
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데이터 시트

TPS7H3301-SP

활성
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제품 상세 정보

DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
DDR memory type DDR2, DDR3, DDR4 Control mode S3, S4/S5 Iout VTT (max) (A) 3 Iq (typ) (mA) 18 Output VREF, VTT Vin (min) (V) 0.9 Vin (max) (V) 3.5 Features Complete Solution, Shutdown Pin for S3 Rating Space Operating temperature range (°C) -55 to 125 Regulator type Linear Regulator Vin bias (max) (V) 3.5 Vin bias (min) (V) 2.375 Vout VTT (min) (V) 0.6
CFP (HKR) 16 105.6 mm² (— mm × — mm)
  • 5962R14228(1):
    • Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail(3)
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
  • 3-A sink and source termination regulator includes droop compensation
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference

    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)

    • ±10-mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated
  • 5962R14228(1):
    • Radiation hardness assurance (RHA) qualified to total ionizing dose (TID) 100 krad(Si)
    • Single event latch-up (SEL), single event gate rupture (SEGR), single event burnout (SEB) immune to LET = 70 MeV-cm2/mg(2)
    • Single event transient (SET), single event functional interrupt (SEFI), and single event upset (SEU) characterized to 70 MeV-cm2/mg(2)
  • Supports DDR, DDR2, DDR3, DDR3L, and DDR4 termination applications
  • Input voltage: supports a 2.5-V and 3.3-V rail(3)
  • Separate low-voltage input (VLDOIN) down to 0.9 V for improved power efficiency(3)
  • 3-A sink and source termination regulator includes droop compensation
  • Enable input and power-good output for power supply sequencing
  • VTT termination regulator
    • Output voltage range: 0.5 to 1.75 V
    • 3-A sink and source current
  • Integrated precision voltage divider network with sense input
  • Remote sensing (VTTSNS)
  • VTTREF buffered reference

    • 49% to 51% accuracy with respect to VDDQSNS (±3 mA)

    • ±10-mA sink and source current
  • Undervoltage lockout (UVLO) and overcurrent limit (OCL) functionality integrated

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.

The TPS7H3301-SP is a TID and SEE radiation-hardened double data rate (DDR) 3-A termination regulator with built-in VTTREF buffer. The regulator is specifically designed to provide a complete, compact, low-noise solution for space DDR termination applications such as single board computers, solid state recorders, and payload processing.

The TPS7H3301-SP supports DDR VTT termination applications using DDR, DDR2, DDR3, DDR4. The fast transient response of the TPS7H3301-SP VTT regulator allows for a very stable supply during read/write conditions. During transients, the fast tracking feature of the VTTREF supply minimizes any voltage offset between VTT/Vo and VTTREF. To enable simple power sequencing, both an enable input and a power-good output (PGOOD) have been integrated into the TPS7H3301-SP. The PGOOD output is open-drain so it can be tied to multiple open-drain outputs to monitor when all supplies have come into regulation. The enable signal can also be used to discharge VTT/Vo during suspend to RAM (S3) power down mode.
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관심 가지실만한 유사 제품

open-in-new 대안 비교
다른 핀 출력을 지원하지만 비교 대상 장치와 동일한 기능.
TPS7H3302-SP 활성 방사능 저항, QML-P, 2.3V~3.5V 입력, 3A 싱크 및 소스 DDR 종단 LDO 레귤레이터 QMLP plastic package with same radiation performance
TPS7H3302-SEP 활성 방사선 내성, 2.3V~3.5V 입력, 3A 싱크 및 소스 DDR 종단 LDO 레귤레이터 -SEP plastic package with reduced TID and SEE radiation performance

기술 자료

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21개 모두 보기
상위 문서 유형 직함 형식 옵션 최신 영어 버전 다운로드 날짜
* 데이터 시트 TPS7H3301-SP Sink and Source Radiation-Hardened 3-A DDR Termination Regulator With Built-In VTTREF Buffer datasheet (Rev. C) PDF | HTML 2024. 9. 27
* 방사능 및 안정성 보고서 TPS7H3301-SP and TPS7H3302-SP Single-Event Effects Radiation Report (Rev. C) 2024. 1. 26
* 방사능 및 안정성 보고서 TPS7H3301-SP Neutron Displacement Damage Characterization 2019. 4. 12
* 방사능 및 안정성 보고서 TPS7H3301-SP Total Ionizing Dose Radiation Report 2016. 7. 1
* SMD TPS7H3301-SP SMD 5962-14228 2016. 7. 8
선택 가이드 TI Space Products (Rev. L) 2026. 3. 27
애플리케이션 노트 Hermetic Package Reflow Profiles, Termination Finishes, and Lead Trim and Form (Rev. A) PDF | HTML 2025. 11. 5
Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 2025. 6. 17
애플리케이션 노트 Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 2025. 6. 10
추가 자료 TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 2025. 2. 20
애플리케이션 노트 Using Space Grade Power Components to Power AMD Kintex XQRKU060 FPGA PDF | HTML 2023. 11. 8
애플리케이션 노트 Using Space Grade Power Components to Power Microchip RT PolarFire FPGA PDF | HTML 2023. 9. 20
애플리케이션 노트 QML flow, its importance, and obtaining lot information (Rev. C) 2023. 8. 30
애플리케이션 노트 Space Grade Power Solution for Microsemi RTG4 PDF | HTML 2023. 5. 2
애플리케이션 노트 TI Space Rated Power Solution for Microsemi® RTG4™ FPGA (Rev. B) PDF | HTML 2023. 1. 19
애플리케이션 노트 Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022. 10. 19
애플리케이션 노트 DLA Standard Microcircuit Drawings (SMD) and JAN Part Numbers Primer 2020. 8. 21
애플리케이션 노트 DDR VTT Power Solutions: A Competitive Analysis (Rev. A) 2020. 7. 9
e북 Radiation Handbook for Electronics (Rev. A) 2019. 5. 21
애플리케이션 노트 External Soft-Start Circuit for TPS7H3301-SP Power-Up Sequencing Applications 2016. 7. 7
기술 문서 7 things to know about spacecraft subsystems before your next trip to Mars PDF | HTML 2016. 7. 6

설계 및 개발

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평가 보드

TPS7H3301EVM-CVAL — TPS7H3301-SP DDR 종단 평가 모듈

TPS7H3301-SP 소스/싱크 DDR(두 배 데이터 속도) 종단 레귤레이터는 저잡음 애플리케이션의 시스템 요구 사항을 지원하도록 설계되었습니다.

시스템 솔루션 크기를 줄이고 효율을 개선하며 간단한 시스템 설계 통합을 지원하는 통합 솔루션입니다.

사용 설명서: PDF
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개발 키트

ALPHA-XILINX-KU060-SPACE — TI 전원을 사용하는 Xilinx® Kintex® UltraScale™ XQRKU060 FPGA용 Alpha Data® 보드

This is a development kit for the Xilinx® XQRKU060 FPGA with industrial -1 speed grade. ADA-SDEV-KIT2 has a modular board design with a XRTC-compatible configuration module, two FMC connectors, DDR3 DRAM, system monitoring, and space-grade TI power management and temperature-sensing solutions.
발송: Alpha Data Parallel Systems Ltd.
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시뮬레이션 모델

TPS7H3301-SP PSpice Transient Model (Rev. B)

SLVMBF1B.ZIP (116 KB) - PSpice 모델
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시뮬레이션 모델

TPS7H3301-SP Unencrypted PSPICE Transient Model

SLVMDD2.ZIP (196 KB) - PSpice 모델
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계산 툴

SLVC650 — TPS7H3301-SP Calculator

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CFP (HKR) 16 Ultra Librarian
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