DS160PT801

Name: DS160PT801
Brand: TI
SKU: DS160PT801
Price: 19.55 USD

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Retimer, PCIe® 4.0, 16 Gbit/s, 8 Spuren (16 Kanäle)

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Datenblatt

document-pdfAcrobat DS160PT801 PCIe 4.0, 16 Gbps, 8-Lane (16-Channel) Retimer datasheet (Rev. A) (Englisch) PDF | HTML

DS160PT801

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Datenblatt

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Produktdetails

Type

Retimer

Protocols

PCIe1, PCIe2, PCIe3, PCIe4

Applications

PCIe

Number of channels

16

Speed (max) (Gbpp)

16

Supply voltage (V)

1.17, 1.8

Rating

Catalog

Operating temperature range (°C)

-40 to 85

Type

Retimer

Protocols

PCIe1, PCIe2, PCIe3, PCIe4

Applications

PCIe

Number of channels

16

Speed (max) (Gbpp)

16

Supply voltage (V)

1.17, 1.8

Rating

Catalog

Operating temperature range (°C)

-40 to 85

FCCSP (ACB)

332

113.9 mm² 13.4 x 8.5

8-lane (16-channel) protocol-aware PCI-express retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s interfaces
Inter-chip communication (ICC) enable dual chip link width scaling to form 16-lane Gen-4 retimer
Supports common clock, separate reference clock with no spread spectrum clocking (SSC), and separate reference clock with SSC
Supports 2x4 bifurcation
Adaptive receive CTLE and DFE supporting maximum PCIe Gen-4 channel loss
Supports equalization training
Low-latency architecture
On-chip eye opening monitor (EOM) and PCIe receive margining capability
Small 8.50-mm × 13.40-mm BGA package
Flow-through pinout enables signal breakout in two signal layers
Compatible with standard 1.00-mm BGA PCB manufacturing
Dual power supply: 1.17 V and 1.8 V
I2C configuration (up to 1 MHz) through the external EEPROM or I2C controller
Industrial temperature range: −40°C to 85°C

8-lane (16-channel) protocol-aware PCI-express retimer supporting 16.0, 8.0, 5.0, and 2.5 GT/s interfaces
Inter-chip communication (ICC) enable dual chip link width scaling to form 16-lane Gen-4 retimer
Supports common clock, separate reference clock with no spread spectrum clocking (SSC), and separate reference clock with SSC
Supports 2x4 bifurcation
Adaptive receive CTLE and DFE supporting maximum PCIe Gen-4 channel loss
Supports equalization training
Low-latency architecture
On-chip eye opening monitor (EOM) and PCIe receive margining capability
Small 8.50-mm × 13.40-mm BGA package
Flow-through pinout enables signal breakout in two signal layers
Compatible with standard 1.00-mm BGA PCB manufacturing
Dual power supply: 1.17 V and 1.8 V
I2C configuration (up to 1 MHz) through the external EEPROM or I2C controller
Industrial temperature range: −40°C to 85°C

The DS160PT801 is a high-performance eight-lane (16-channel) PCI-Express protocol-aware retimer supporting all standard PCIe data rates up to 16 GT/s. It is used to extend the reach and robustness of high-speed PCIe serial links, from chip-to-chip motherboard links to more complex multi-connector system topologies.

The DS160PT801 supports both common-clock and independent reference clock architectures, with and without spread-spectrum clocking. This allows for maximum flexibility in defining the system clock architecture.

The eight lanes in the DS160PT801 can be bifurcated into two x4 links to support different system topologies.

A compact yet easy-to-manufacture BGA package provides excellent thermal performance while enabling optimal placement in space-constrained applications like 1RU riser cards. This feature reduces overall solution size, PCB routing complexity, and BOM cost.

Diagnostic capabilities include in-band receiver margining, out-of-band non-destructive horizontal or vertical eye margin monitor, receiver loopback, encoding error detection, and on die temperature sensor. These features help gauge link margin and can be used to monitor system health over time.

The DS160PT801 is configurable through SMBus interface. The Initial configuration can be automatically loaded from external EEPROM.

The DS160PT801 is a high-performance eight-lane (16-channel) PCI-Express protocol-aware retimer supporting all standard PCIe data rates up to 16 GT/s. It is used to extend the reach and robustness of high-speed PCIe serial links, from chip-to-chip motherboard links to more complex multi-connector system topologies.

The DS160PT801 supports both common-clock and independent reference clock architectures, with and without spread-spectrum clocking. This allows for maximum flexibility in defining the system clock architecture.

The eight lanes in the DS160PT801 can be bifurcated into two x4 links to support different system topologies.

A compact yet easy-to-manufacture BGA package provides excellent thermal performance while enabling optimal placement in space-constrained applications like 1RU riser cards. This feature reduces overall solution size, PCB routing complexity, and BOM cost.

Diagnostic capabilities include in-band receiver margining, out-of-band non-destructive horizontal or vertical eye margin monitor, receiver loopback, encoding error detection, and on die temperature sensor. These features help gauge link margin and can be used to monitor system health over time.

The DS160PT801 is configurable through SMBus interface. The Initial configuration can be automatically loaded from external EEPROM.

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