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LVDS、M-LVDS 和 PECL IC

DS80EP100

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适用于背板和电缆的 5 至 12.5Gbps 省电均衡器

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数据表

DS80EP100

正在供货
数据表 立即订购

产品详情

Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (MBits) 12500 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Equalizer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Signaling rate (MBits) 12500 Input signal CML, LVDS, LVPECL Output signal CML, LVDS, LVPECL Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGF) 6 5.5 mm² 2.5 x 2.2
  • 5 to 12.5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Will Operate in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

  • 5 to 12.5 Gbps Operation
  • No Power or Ground Required
  • Equalization Effective Anywhere in Data Path
  • Equalizes CML, LV-PECL, LVDS Signals
  • Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
  • 7 dB Maximum Boost
  • Code Independent, 8b/10b or Scrambled
  • Supports Both Bi-level and Multi-level Signaling
  • Extends Reach Over Backplanes and Cables
  • Compatible with PCI-Express Gen1 and Gen2
  • Compatible with XAUI
  • Will Operate in Series with Existing Active Equalizer
  • Easy to Handle 6 Pin WSON

All trademarks are the property of their respective owners.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling.

The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.
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* 数据表 DS80EP100 5 to 12.5 Gbps, Power-Saver Equalizer for Backplanes and Cables 数据表 (Rev. C) 2013年 2月 19日

设计和开发

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评估板

DS80EP100-EVK — 10 Gbps 省电均衡器评估板 12.5 Gbps 省电均衡器评估板

Nationals Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps.

用户指南: PDF
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仿真模型

DS80EP100 S-Parameter Model

SNLM274.ZIP (25 KB) - S-Parameter Model
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模拟工具

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用户指南: PDF
英语版 (Rev.A): PDF
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封装 引脚 下载
WSON (NGF) 6 查看选项
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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