主页 接口 USB IC USB 集线器和控制器

具有 PIPE 和 ULPI 接口的 SuperSpeed 5Gbps USB 3.0 收发器

产品详情

Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) -40 to 85
Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (ZAY) 175 144 mm² 12 x 12
  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Connection
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant With USB 3.0 Specification, Revision 1.0
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link-Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link-Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low-Power Mode
      • Compliant With UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on One Reference Clock of 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- × 12-nF NFBGA Package (ZAY)
  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Connection
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant With USB 3.0 Specification, Revision 1.0
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link-Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link-Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low-Power Mode
      • Compliant With UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on One Reference Clock of 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- × 12-nF NFBGA Package (ZAY)

The TUSB1310A device is one port, 5.0-Gbps USB 3.0 physical layer transceiver that operates off of one reference clock, which is provided by either a crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310A device provides the clock to the USB controller. The use of one reference clock allows the TUSB1310A device to provide a cost-effective USB 3.0 solution with few external components and a low implementation cost.

The USB controller interfaces to the TUSB1310A device through a PIPE (SuperSpeed) and a ULPI (USB 2.0) interface. The 16-bit PIPE operates off of a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active and idle power consumption with improved power-management features. The low-power states of the TUSB1310A device are controlled by the USB controller through the PIPE interface.

SuperSpeed USB uses existing USB software infrastructure by keeping the existing software interfaces and software drivers intact. In addition, SuperSpeed USB retains backward compatibility with USB 2.0 based products by using the same form-factor Type-A connector and cables. Existing USB 2.0 devices work with new USB 3.0 hosts and new USB 3.0 devices with work with legacy USB 2.0 hosts.

The TUSB1310A device is one port, 5.0-Gbps USB 3.0 physical layer transceiver that operates off of one reference clock, which is provided by either a crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310A device provides the clock to the USB controller. The use of one reference clock allows the TUSB1310A device to provide a cost-effective USB 3.0 solution with few external components and a low implementation cost.

The USB controller interfaces to the TUSB1310A device through a PIPE (SuperSpeed) and a ULPI (USB 2.0) interface. The 16-bit PIPE operates off of a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active and idle power consumption with improved power-management features. The low-power states of the TUSB1310A device are controlled by the USB controller through the PIPE interface.

SuperSpeed USB uses existing USB software infrastructure by keeping the existing software interfaces and software drivers intact. In addition, SuperSpeed USB retains backward compatibility with USB 2.0 based products by using the same form-factor Type-A connector and cables. Existing USB 2.0 devices work with new USB 3.0 hosts and new USB 3.0 devices with work with legacy USB 2.0 hosts.

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类型 标题 下载最新的英语版本 日期
* 数据表 TUSB1310A USB 3.0 Transceiver 数据表 (Rev. G) PDF | HTML 2017年 11月 12日
* 勘误表 TUSB1310A Errata 2011年 1月 26日
白皮书 A Primer on USB Type-C and Power Delivery Applications and Requirements (Rev. B) PDF | HTML 2022年 3月 25日
白皮书 USB Type-C 和电力输送应用和要求入门 (Rev. A) 最新英语版本 (Rev.B) PDF | HTML 2021年 2月 4日
应用手册 TUSB1310 Implementation Guide 2010年 6月 18日

设计和开发

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仿真模型

TUSB1310A IBIS Model

SLLM160.ZIP (1540 KB) - IBIS Model
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用户指南: PDF
英语版 (Rev.A): PDF
封装 引脚 下载
NFBGA (ZAY) 175 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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