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TLV571

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具有自动或 S/W 电源关闭功能的 8 位 1.25MSPS 单通道硬件配置，低功耗

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TLV571

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产品详情

Resolution (Bits) 8 Sample rate (max) (ksps) 1250 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 12 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 49 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
Resolution (Bits) 8 Sample rate (max) (ksps) 1250 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 12 Analog supply (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 49 Digital supply (min) (V) 2.7 Digital supply (max) (V) 5.5
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4
  • Fast Throughput Rate: 1.25 MSPS at 5 V, 625 KSPS at 3 V
  • Wide Analog Input: 0 V to AVDD
  • Differential Nonlinearity Error: < ± 0.5 LSB
  • Integral Nonlinearity Error: < ± 0.5 LSB
  • Single 2.7-V to 5.5-V Supply Operation
  • Low Power: 12 mW at 3 V and 35 mW at 5 V
  • Auto Power Down of 1 mA Max
  • Software Power Down: 10 uA Max
  • Internal OSC
  • Hardware Configurable
  • DSP and Microcontroller Compatible Parallel Interface
  • Binary/Twos Complement Output
  • Hardware Controlled Extended Sampling
  • Hardware or Software Start of Conversion
  • Applications
    • Mass Storage and HDD
    • Automotive
    • Digital Servos
    • Process Control
    • General-Purpose DSP
    • Image Sensor Processing
  • Fast Throughput Rate: 1.25 MSPS at 5 V, 625 KSPS at 3 V
  • Wide Analog Input: 0 V to AVDD
  • Differential Nonlinearity Error: < ± 0.5 LSB
  • Integral Nonlinearity Error: < ± 0.5 LSB
  • Single 2.7-V to 5.5-V Supply Operation
  • Low Power: 12 mW at 3 V and 35 mW at 5 V
  • Auto Power Down of 1 mA Max
  • Software Power Down: 10 uA Max
  • Internal OSC
  • Hardware Configurable
  • DSP and Microcontroller Compatible Parallel Interface
  • Binary/Twos Complement Output
  • Hardware Controlled Extended Sampling
  • Hardware or Software Start of Conversion
  • Applications
    • Mass Storage and HDD
    • Automotive
    • Digital Servos
    • Process Control
    • General-Purpose DSP
    • Image Sensor Processing

The TLV571 is an 8-bit data acquisition system that combines a high-speed 8-bit ADC and a parallel interface. The device contains two on-chip control registers allowing control of software conversion start and power down via the bidirectional parallel port. The control registers can be set to a default mode using a dummy RD\ while WR\ is tied low allowing the registers to be hardware configurable.

The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to AVDD and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only 12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the ADC is further powered down to only 10 uA.

Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal choice for high-speed digital signal processing.

The TLV571 is an 8-bit data acquisition system that combines a high-speed 8-bit ADC and a parallel interface. The device contains two on-chip control registers allowing control of software conversion start and power down via the bidirectional parallel port. The control registers can be set to a default mode using a dummy RD\ while WR\ is tied low allowing the registers to be hardware configurable.

The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to AVDD and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only 12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the ADC is further powered down to only 10 uA.

Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal choice for high-speed digital signal processing.
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类型 项目标题 下载最新的英语版本 日期
* 数据表 2.7 V To 5.5 V, 1-Channel, 8-Bit Parallel ADC 数据表 (Rev. A) 2000年 2月 9日
电子书 Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
应用手册 Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
用户指南 Characteristics, Operation, and Use of the TLV571/TLV157x EVM (Rev. A) 2000年 11月 30日

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用户指南: PDF
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SOIC (DW) 24 了解详情
TSSOP (PW) 24 了解详情
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