产品详情

Number of channels 16 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVC Rating Catalog Operating temperature range (°C) -40 to 125
Number of channels 16 IOL (max) (mA) 12 IOH (max) (mA) -12 Input type TTL/CMOS Output type LVTTL Features Balanced outputs Technology family LVC Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm) SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm)
  • Member of the Texas Instruments
    Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.8 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Signal Operation on
    All Ports (5-V Input/Output Voltage
    With 3.3-V VCC)
  • Bus Hold on Data Inputs Eliminates the Need
    for External Pullup or Pulldown Resistors
  • All Outputs Have Equivalent 26-Ω Series
    Resistors,So No External Resistors Are
    Required
  • Ioff Supports Live Insertion, Partial Power-Down
    Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 250 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
  • Member of the Texas Instruments
    Widebus™ Family
  • Operates From 1.65 V to 3.6 V
  • Inputs Accept Voltages to 5.5 V
  • Max tpd of 4.8 ns at 3.3 V
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2 V at VCC = 3.3 V, TA = 25°C
  • Supports Mixed-Mode Signal Operation on
    All Ports (5-V Input/Output Voltage
    With 3.3-V VCC)
  • Bus Hold on Data Inputs Eliminates the Need
    for External Pullup or Pulldown Resistors
  • All Outputs Have Equivalent 26-Ω Series
    Resistors,So No External Resistors Are
    Required
  • Ioff Supports Live Insertion, Partial Power-Down
    Mode, and Back-Drive Protection
  • Latch-Up Performance Exceeds 250 mA
    Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model

This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVCHR16245A device is designed for asynchronous communication between data buses. The control-function implementation minimizes external-timing requirements.

This 16-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.

The SN74LVCHR16245A device is designed for asynchronous communication between data buses. The control-function implementation minimizes external-timing requirements.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74LVCHR16245A 16-Bit Bus Transceiver With 3-State Outputs 数据表 (Rev. Q) PDF | HTML 2014-10-12
应用手册 An Overview of Bus-Hold Circuit and the Applications (Rev. B) 2018-9-17
应用手册 Simultaneous-Switching Performance of TI Logic Devices (Rev. B) 2005-2-23

设计与开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

仿真模型

HSPICE MODEL OF SN74LVCHR16245A

SCEJ215.ZIP (101 KB) - HSpice 模型
支持的产品和硬件
仿真模型

SN74LVCHR16245A IBIS Model (Rev. A)

SCAM012 (242 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian
SSOP (DL) 48 Ultra Librarian

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