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Bits (#) 8 Data rate (max) (Mbps) 200 Topology Push-Pull Vin (min) (V) 4.5 Vin (max) (V) 5.5 Vout (min) (V) 2.7 Vout (max) (V) 5.5 Features Output enable Prop delay (ns) 7 Technology family LVC Supply current (max) (mA) 0.13 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
Bits (#) 8 Data rate (max) (Mbps) 200 Topology Push-Pull Vin (min) (V) 4.5 Vin (max) (V) 5.5 Vout (min) (V) 2.7 Vout (max) (V) 5.5 Features Output enable Prop delay (ns) 7 Technology family LVC Supply current (max) (mA) 0.13 Rating HiRel Enhanced Product Operating temperature range (°C) -55 to 125
TSSOP (PW) 24 49.92 mm² (7.8 mm × 6.4 mm)
  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Bidirectional Voltage Translator
  • 4.5 V to 5.5 V on A Port and 2.7 V to 5.5 V on B Port
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

  • Controlled Baseline
    • One Assembly Site
    • One Test Site
    • One Fabrication Site
  • Extended Temperature Performance of -55°C to 125°C
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree(1)
  • Bidirectional Voltage Translator
  • 4.5 V to 5.5 V on A Port and 2.7 V to 5.5 V on B Port
  • Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The SN74LVCC4245A is an 8-bit (octal) noninverting bus transceiver that uses two separate power-supply rails. The A port (VCCA) is dedicated to accepting a 5-V supply level, and the configurable B port, which is designed to track VCCB, accepts voltages from 3 V to 5 V. This allows for translation from a 3.3-V to a 5-V environment and vice versa.

The SN74LVCC4245A is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses effectively are isolated. The control circuitry (DIR, OE) is powered by VCCA.

The SN74LVCC4245A is an 8-bit (octal) noninverting bus transceiver that uses two separate power-supply rails. The A port (VCCA) is dedicated to accepting a 5-V supply level, and the configurable B port, which is designed to track VCCB, accepts voltages from 3 V to 5 V. This allows for translation from a 3.3-V to a 5-V environment and vice versa.

The SN74LVCC4245A is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses effectively are isolated. The control circuitry (DIR, OE) is powered by VCCA.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74LVCC4245A-EP 数据表 2007-3-13
* 辐射与可靠性报告 CLVCC4245AMPWREP Reliability Report 2012-3-15
* VID SN74LVCC4245A-EP VID V6206658 2016-6-21
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选择指南 Voltage Translation Buying Guide (Rev. A) 2021-4-15

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