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SN74LV245AT

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具有三态输出的八路总线收发器

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数据表

SN74LV245AT

正在供货
数据表 立即订购

产品详情

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Input type TTL Output type CMOS Features Balanced outputs Technology family LV-AT Rating Catalog Operating temperature range (°C) -40 to 125
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 16 IOH (max) (mA) -16 Input type TTL Output type CMOS Features Balanced outputs Technology family LV-AT Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (DW) 20 131.84 mm² 12.8 x 10.3 SOP (NS) 20 98.28 mm² 12.6 x 7.8 SSOP (DB) 20 56.16 mm² 7.2 x 7.8 TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 TVSOP (DGV) 20 32 mm² 5 x 6.4 VQFN (RGY) 20 15.75 mm² 4.5 x 3.5
  • Inputs Are TTL-Voltage Compatible
  • 4.5-V to 5.5-V VCC Operation
  • Typical tpd of 3.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) <0.8 V
    at VCC = 5 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2.3 V
    at VCC = 5 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

  • Inputs Are TTL-Voltage Compatible
  • 4.5-V to 5.5-V VCC Operation
  • Typical tpd of 3.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) <0.8 V
    at VCC = 5 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) >2.3 V
    at VCC = 5 V, TA = 25°C
  • Supports Mixed-Mode Voltage Operation on All Ports
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

The SN74LV245AT allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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类型 项目标题 下载最新的英语版本 日期
* 数据表 SN74LV245AT 数据表 (Rev. D) 2013年 8月 1日

设计和开发

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评估板

14-24-LOGIC-EVM — 支持 14 到 24 引脚 PW、DB、D、DW、NS、DYY 和 DGV 封装的通用逻辑 EVM

该 EVM 设计用于支持采用 14 至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

用户指南: PDF | HTML
下载英文版本 (Rev.B): PDF | HTML
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评估板

14-24-NL-LOGIC-EVM — 通用 14 至 24 引脚无铅封装评估模块

Flexible EVM designed to support any logic or translation device that has a BQA, BQB, RGY (14-24 pin), RSV, RJW, or RHL package.
用户指南: PDF | HTML
下载英文版本 (Rev.A): PDF | HTML
TI.com 上无现货
仿真模型

SN74LV245AT IBIS Model

SCEM480.ZIP (16 KB) - IBIS Model
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封装 引脚数 下载
SOIC (DW) 20 了解详情
SOP (NS) 20 了解详情
SSOP (DB) 20 了解详情
TSSOP (PW) 20 了解详情
TVSOP (DGV) 20 了解详情
VQFN (RGY) 20 了解详情
应遵守 TI 的评估模块标准条款与条件.

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

支持与培训

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