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Technology family LV-A Number of channels 6 IOL (max) (mA) 16 Supply current (max) (µA) 20 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Number of channels 6 IOL (max) (mA) 16 Supply current (max) (µA) 20 IOH (max) (mA) 0 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm)
  • 2-V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are Disabled During Power Up
    and Power Down With Inputs Tied to VCC
  • Support Mixed-Mode Voltage Operation
    on All Ports
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model
  • 2-V to 5.5-V VCC Operation
  • Typical VOLP (Output Ground Bounce)
    < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot)
    > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are Disabled During Power Up
    and Power Down With Inputs Tied to VCC
  • Support Mixed-Mode Voltage Operation
    on All Ports
  • Latch-Up Performance Exceeds 100 mA
    Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model
    • 200-V Machine Model
    • 1000-V Charged-Device Model

These hex buffers/drivers are designed for 2-V to
5.5-V VCC operation.

The SN74LV07A device performs the Boolean function Y = A in positive logic.

These hex buffers/drivers are designed for 2-V to
5.5-V VCC operation.

The SN74LV07A device performs the Boolean function Y = A in positive logic.

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* 数据表 SN74LV07A Hex Buffers/Drivers With Open-Drain Outputs 数据表 (Rev. K) PDF | HTML 2014-10-10
技术文章 How to keep your motor running safely PDF | HTML 2020-6-4

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14-24-LOGIC-EVM 评估模块 (EVM) 设计用于支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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仿真模型

SN74LV07A Behavioral SPICE Model

SCEM660.ZIP (7 KB) - PSpice 模型
支持的产品和硬件
仿真模型

SN74LV07A IBIS Model

SCEM464.ZIP (9 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
SOP (NS) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian

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