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SN74HCT646

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具有三态输出的八通道总线收发器和寄存器

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数据表

SN74HCT646

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数据表 立即订购

产品详情

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Input type TTL Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HCT Rating Catalog Operating temperature range (°C) -40 to 85
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 6 IOH (max) (mA) -6 Input type TTL Output type CMOS Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Technology family HCT Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • Operating Voltage Range of 4.5 V to 5.5 V
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Inputs Are TTL-Voltage Compatible
  • Independent Registers for A and B Buses
  • Multiplexed Real-Time and Stored Data
  • True Data Paths
  • High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads
  • Operating Voltage Range of 4.5 V to 5.5 V
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 12 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max
  • Inputs Are TTL-Voltage Compatible
  • Independent Registers for A and B Buses
  • Multiplexed Real-Time and Stored Data
  • True Data Paths
  • High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads

The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is active (low). In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store data. Only one of the two buses, A or B, can be driven at a time.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The ’HCT646 devices consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’HCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR determines which bus receives data when OE\ is active (low). In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.

When an output function is disabled, the input function still is enabled and can be used to store data. Only one of the two buses, A or B, can be driven at a time.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
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类型 标题 下载最新的英语版本 日期
* 数据表 SN54HCT646, SN74HCT646 数据表 (Rev. C) 2003年 3月 18日
应用手册 Implications of Slow or Floating CMOS Inputs (Rev. E) 2021年 7月 26日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
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选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
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应用手册 CMOS Power Consumption and CPD Calculation (Rev. B) 1997年 6月 1日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 SN54/74HCT CMOS Logic Family Applications and Restrictions 1996年 5月 1日
应用手册 Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 1996年 4月 1日

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用户指南: PDF | HTML
英语版 (Rev.B): PDF | HTML
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订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

支持和培训

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