SN74HCS16507-Q1

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汽车类 8 位并行负载移位寄存器

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Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Open-drain Clock frequency (MHz) 150 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
Configuration Parallel-in, Serial-out Bits (#) 8 Technology family HCS Input type Schmitt-Trigger Output type Open-drain Clock frequency (MHz) 150 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Supply current (max) (µA) 2 Features High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 125 Rating Automotive
TSSOP (PW) 16 32 mm² (5 mm × 6.4 mm) SOIC (D) 16 59.4 mm² (9.9 mm × 6 mm)
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • 7.8-mA output drive at 6 V
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • 7.8-mA output drive at 6 V

The is a parallel- or serial-in, serial-out 8-bit shift register with open-drain outputs.

The is a parallel- or serial-in, serial-out 8-bit shift register with open-drain outputs.

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* 数据表 SN74HCS16507-Q1 Automotive 8-Bit Parallel-Load Shift Registers with Open-Drain Outputs 数据表 PDF | HTML 2020-8-12

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14-24-LOGIC-EVM — 采用 14 引脚至 24 引脚 D、DB、DGV、DW、DYY、NS 和 PW 封装的逻辑产品通用评估模块

14-24-LOGIC-EVM 评估模块 (EVM) 设计用于支持采用 14 引脚至 24 引脚 D、DW、DB、NS、PW、DYY 或 DGV 封装的任何逻辑器件。

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TSSOP (PW) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian

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