SN74F574

Name: SN74F574
Brand: TI
SKU: SN74F574
Price: 0.235 USD

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具有三态输出的八路边沿 D 类触发器

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数据表

document-pdfAcrobat Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 数据表 (Rev. A) (英语)

SN74F574

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数据表

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产品详情

Number of channels

8

Technology family

F

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

100

IOL (max) (mA)

24

IOH (max) (mA)

-3

Supply current (max) (µA)

86000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

Number of channels

8

Technology family

F

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Input type

Bipolar

Output type

3-State

Clock frequency (max) (MHz)

100

IOL (max) (mA)

24

IOH (max) (mA)

-3

Supply current (max) (µA)

86000

Features

Very high speed (tpd 5-10ns)

Operating temperature range (°C)

0 to 70

Rating

Catalog

PDIP (N)

20

228.702 mm² 24.33 x 9.4

SOIC (DW)

20

131.84 mm² 12.8 x 10.3

SOP (NS)

20

98.28 mm² 12.6 x 7.8

Eight D-Type Flip-Flops in a Single Package
3-State Bus-Driving True Outputs
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

Eight D-Type Flip-Flops in a Single Package
3-State Bus-Driving True Outputs
Full Parallel Access for Loading
Buffered Control Inputs
Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0°C to 70°C.

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0°C to 70°C.

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