产品详情

Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 6.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 40000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
Protocols Analog Configuration 1:1 SPST Number of channels 20 Bandwidth (MHz) 200 Ron (typ) (mΩ) 5000 Input/output voltage (min) (V) 0 Input/output voltage (max) (V) 3.6 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 128 COFF (typ) (pF) 6.5 OFF-state leakage current (max) (µA) 1 Ron (max) (mΩ) 40000 VIH (min) (V) 2 VIL (max) (V) 0.8 Rating Catalog
SSOP (DL) 48 164.358 mm² (15.88 mm × 10.35 mm) TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm) TVSOP (DGV) 48 62.08 mm² (9.7 mm × 6.4 mm)
  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Parital-Power-Down Mode

Widebus is a trademark of Texas Instruments.

  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Parital-Power-Down Mode

Widebus is a trademark of Texas Instruments.

The SN74CBTLV16210 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV16210 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 SN74CBTLV16210 数据表 (Rev. J) 2004-7-19
应用手册 选择正确的德州仪器 (TI) 信号开关 (Rev. E) PDF | HTML 英语版 (Rev.E) PDF | HTML 2022-8-5
应用手册 多路复用器和信号开关词汇表 (Rev. B) 英语版 (Rev.B) PDF | HTML 2022-3-11
应用简报 利用关断保护信号开关消除电源时序 (Rev. C) 英语版 (Rev.C) PDF | HTML 2021-10-21

设计与开发

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仿真模型

HSPICE Model of SN74CBTLV16210

SCDJ020.ZIP (90 KB) - HSpice 模型
支持的产品和硬件
仿真模型

SN74CBTLV16210 IBIS Model

SCDM068.ZIP (25 KB) - IBIS 模型
支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
SSOP (DL) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian

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