SN74ALVCH162827
- Member of the Texas Instruments Widebus Family
- Output Ports Have Equivalent 26-
Series Resistors, So No External Resistors Are Required - Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Widebus is a trademark of Texas Instruments Incorporated.
This 20-bit noninverting buffer/driver is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH162827 is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1\ and 1OE2\ or 2OE1\ and 2OE2\) inputs must both be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 10-bit buffer section are in the high-impedance state.
The outputs, which are designed to sink up to 12 mA, include equivalent 26-
resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
技术文档
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | SN74ALVCH162827 数据表 (Rev. H) | 2004-8-16 | |||
| 应用手册 | Drive Transmission Lines With Logic | PDF | HTML | 2020-10-20 | |||
| 应用手册 | An Overview of Bus-Hold Circuit and the Applications (Rev. B) | 2018-9-17 |
设计与开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SSOP (DL) | 56 | Ultra Librarian |
| TVSOP (DGV) | 56 | Ultra Librarian |
| TSSOP (DGG) | 56 | Ultra Librarian |