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Technology family TTL Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL Output type TTL Operating temperature range (°C) -55 to 125 Rating Military
Technology family TTL Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type TTL Output type TTL Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3
  • Packages Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability
  • Packages Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages
  • Dependable Texas Instruments Quality and Reliability

These J-K flip-flops are based on the master-slave principle and each has AND gate inputs for entry into the master section which are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows:

  • 1. Isolate slave from master
  • 2. Enter information from AND gate inputs to master
  • 3. Disable AND gate inputs
  • 4. Transfer information from master to slave

The logical states of the J and K inputs must not be allowed to change when the clock pulse is in a high state.

The SN5472, and the SN54H72 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7472 is characterized for operation from 0°C to 70°C.

These J-K flip-flops are based on the master-slave principle and each has AND gate inputs for entry into the master section which are controlled by the clock pulse. The clock pulse also regulates the state of the coupling transistors which connect the master and slave sections. The sequence of operation is as follows:

  • 1. Isolate slave from master
  • 2. Enter information from AND gate inputs to master
  • 3. Disable AND gate inputs
  • 4. Transfer information from master to slave

The logical states of the J and K inputs must not be allowed to change when the clock pulse is in a high state.

The SN5472, and the SN54H72 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN7472 is characterized for operation from 0°C to 70°C.

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类型 标题 下载最新的英语版本 日期
* 数据表 AND-Gated J-K Master-Slave Flip-Flops With Preset And Clear 数据表 1988年 3月 1日
应用手册 Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022年 12月 15日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
应用手册 使用逻辑器件进行设计 (Rev. C) 1997年 6月 1日
应用手册 Input and Output Characteristics of Digital Integrated Circuits 1996年 10月 1日
应用手册 Live Insertion 1996年 10月 1日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

封装 引脚 下载
CDIP (J) 14 查看选项
CFP (W) 14 查看选项

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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