DS90LV032AQML

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3V LVDS 四路 CMOS 差分线路接收器

产品详情

Function Receiver Protocols ECL, LVDS, PECL Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL Rating Military Operating temperature range (°C) -55 to 85
Function Receiver Protocols ECL, LVDS, PECL Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 400 Input signal LVDS Output signal LVTTL Rating Military Operating temperature range (°C) -55 to 85
CFP (NAD) 16 62.9285 mm² 9.91 x 6.35
  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

  • Low chip to chip skew
  • Low differential skew
  • High impedance LVDS inputs with power-off
  • Low power dissipation
  • Accepts small swing (330 mV) differential signal levels.
  • Compatible with ANSI/TIA/EIA-644
  • Operating temperature range (-55°C to +85°C)
  • Pin compatible with DS90C032A and DS26C32A.
  • Typical Rise/Fall time is 350pS.

All trademarks are the property of their respective owners.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

The DS90LV032A is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The DS90LV032A accepts low voltage (350 mV typical) differential input signals and translates them to 3V CMOS output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs.

The DS90LV032A and companion LVDS line driver (eg. DS90LV031A) provide a new alternative to high power PECL/ECL devices for high speed point-to-point interface applications.

In addition, the DS90LV032A provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.

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类型 标题 下载最新的英语版本 日期
* 数据表 DS90LV032AQML 3V LVDS Quad CMOS Differential Line Receiver 数据表 (Rev. A) 2013年 4月 16日
* SMD DS90LV032AQML SMD 5962-98652 2016年 6月 21日
应用简报 How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
应用简报 How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
更多文献资料 Die D/S DS90LV032 MDS 3V LVDS Quad Cmos Differential Line Receiver 2012年 9月 7日

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DS90LV047-48AEVM — DS90LV047-48AEVM 评估模块

The DS90LV047-48AEVM is an evaluation module (EVM) designed for performance and functional evaluation of Texas Instruments' DS90LV047A 3-V LVDS quad CMOS differential line driver and DS90LV048A 3-V LVDS CMOS differential line receiver. With this kit, users can quickly evaluate the output (...)
用户指南: PDF
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仿真模型

DS90LV032A IBIS Model

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