DS90CF366

正在供货

+3.3V LVDS 接收器 18 位平板显示 (FPD) 链接 - 85MHz

产品详情

Function Deserializer Color depth (bpp) 18 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Applications In-vehicle Infotainment (IVI) EMI reduction LVDS Rating Catalog Operating temperature range (°C) -10 to 70
Function Deserializer Color depth (bpp) 18 Input compatibility FPD-Link LVDS Output compatibility LVCMOS Features Low-EMI Point-to-Point Communication Applications In-vehicle Infotainment (IVI) EMI reduction LVDS Rating Catalog Operating temperature range (°C) -10 to 70
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • 20-MHz to 85-MHz Shift Clock Support
  • Rx Power Consumption <142 mW (Typical) at
    85-MHz Grayscale
  • Rx Power-Down Mode <1.44 mW (Maximum)
  • ESD Rating >7 kV (HBM), >700 V (EIAJ)
  • Supports VGA, SVGA, XGA, and Single Pixel
    SXGA
  • PLL Requires No External Components
  • Compatible With TIA/EIA-644 LVDS Standard
  • Low Profile 56-Pin or 48-Pin TSSOP Package
  • DS90CF386 Also Available in a 64-Pin, 0.8-mm,
    Fine Pitch Ball Grid Array (NFBGA) Package
  • 20-MHz to 85-MHz Shift Clock Support
  • Rx Power Consumption <142 mW (Typical) at
    85-MHz Grayscale
  • Rx Power-Down Mode <1.44 mW (Maximum)
  • ESD Rating >7 kV (HBM), >700 V (EIAJ)
  • Supports VGA, SVGA, XGA, and Single Pixel
    SXGA
  • PLL Requires No External Components
  • Compatible With TIA/EIA-644 LVDS Standard
  • Low Profile 56-Pin or 48-Pin TSSOP Package
  • DS90CF386 Also Available in a 64-Pin, 0.8-mm,
    Fine Pitch Ball Grid Array (NFBGA) Package

The DS90CF386 receiver converts four LVDS (Low Voltage Differential Signaling) data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CF366 receiver that converts three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the falling edge. A rising edge or falling edge strobe transmitter will interoperate with a falling edge strobe receiver without any translation logic.

The receiver LVDS clock operates at rates from 20 MHz to 85 MHz. The device phase-locks to the input LVDS clock, samples the serial bit streams at the LVDS data lines, and converts them into parallel output data. At an incoming clock rate of 85 MHz, each LVDS input line is running at a bit rate of 595 Mbps, resulting in a maximum throughput of 2.38 Gbps for the DS90CF386 and 1.785 Gbps for the DS90CF366.

The use of these serial link devices is ideal for solving EMI and cable size problems associated with transmitting data over wide, high-speed parallel LVCMOS interfaces. Both devices are offered in TSSOP packages. The DS90CF386 is also offered in a 64-pin, 0.8-mm, fine pitch ball grid array (NFBGA) package which provides a 44% reduction in PCB footprint compared to the 56-pin TSSOP package.

The DS90CF386 receiver converts four LVDS (Low Voltage Differential Signaling) data streams back into parallel 28 bits of LVCMOS data. Also available is the DS90CF366 receiver that converts three LVDS data streams back into parallel 21 bits of LVCMOS data. The outputs of both receivers strobe on the falling edge. A rising edge or falling edge strobe transmitter will interoperate with a falling edge strobe receiver without any translation logic.

The receiver LVDS clock operates at rates from 20 MHz to 85 MHz. The device phase-locks to the input LVDS clock, samples the serial bit streams at the LVDS data lines, and converts them into parallel output data. At an incoming clock rate of 85 MHz, each LVDS input line is running at a bit rate of 595 Mbps, resulting in a maximum throughput of 2.38 Gbps for the DS90CF386 and 1.785 Gbps for the DS90CF366.

The use of these serial link devices is ideal for solving EMI and cable size problems associated with transmitting data over wide, high-speed parallel LVCMOS interfaces. Both devices are offered in TSSOP packages. The DS90CF386 is also offered in a 64-pin, 0.8-mm, fine pitch ball grid array (NFBGA) package which provides a 44% reduction in PCB footprint compared to the 56-pin TSSOP package.

下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 8
类型 标题 下载最新的英语版本 日期
* 数据表 DS90CF3x6 3.3-V LVDS Receiver 24-Bit Or 18-Bit Flat Panel Display (FPD) Link, 85 MHz 数据表 (Rev. J) PDF | HTML 2016年 5月 31日
应用手册 High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs 2018年 11月 9日
应用手册 How to Map RGB Signals to LVDS/OpenLDI(OLDI) Displays (Rev. A) 2018年 6月 29日
应用手册 AN-1032 An Introduction to FPD-Link (Rev. C) 2017年 8月 8日
应用手册 Receiver Skew Margin for Channel Link I and FPD Link I Devices 2016年 1月 13日
应用手册 TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map 2004年 5月 15日
应用手册 AN-1056 STN Application Using FPD-Link 2004年 5月 14日
应用手册 AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines 2004年 5月 14日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

评估板

FLINK3V8BT-85 — 用于 FPD 链接系列串行器和解串器 LVDS 器件的评估套件

FPD-Link evaluation kit contains a Transmitter (Tx) board, a Receiver (Rx) board along with interfacing cables. This kit will demonstrate the chipsets interfacing from test equipment or a graphics controller using Low Voltage Differential Signaling (LVDS) to a receiver board.

The Transmitter board (...)

用户指南: PDF
TI.com 上无现货
模拟工具

PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
模拟工具

TINA-TI — 基于 SPICE 的模拟仿真程序

TINA-TI 提供了 SPICE 所有的传统直流、瞬态和频域分析以及更多。TINA 具有广泛的后处理功能,允许您按照希望的方式设置结果的格式。虚拟仪器允许您选择输入波形、探针电路节点电压和波形。TINA 的原理图捕获非常直观 - 真正的“快速入门”。

TINA-TI 安装需要大约 500MB。直接安装,如果想卸载也很容易。我们相信您肯定会爱不释手。

TINA 是德州仪器 (TI) 专有的 DesignSoft 产品。该免费版本具有完整的功能,但不支持完整版 TINA 所提供的某些其他功能。

如需获取可用 TINA-TI 模型的完整列表,请参阅:SpiceRack - 完整列表 

需要 HSpice (...)

用户指南: PDF
英语版 (Rev.A): PDF
封装 引脚 CAD 符号、封装和 3D 模型
TSSOP (DGG) 48 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持和培训

视频