DS25BR120

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具有发送预加重功能的 3.125Gbps LVDS 缓冲器

产品详情

Function Buffer Protocols LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 3125 Input signal CML, LVCMOS, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGQ) 8 9 mm² 3 x 3
  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Four Levels of Transmit Pre-Emphasis Drive Lossy Backplanes and Cables
  • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space
  • 7 kV ESD on LVDS I/O pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

The DS25BR120 features four levels of pre-emphasis (PE) for use as an optimized driver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

The DS25BR120 is a single channel 3.125 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

The DS25BR120 features four levels of pre-emphasis (PE) for use as an optimized driver device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR110 features four levels of equalization for use as an optimized receiver device, while the DS25BR100 features both pre-emphasis and equalization for use as an optimized repeater device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

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类型 标题 下载最新的英语版本 日期
* 数据表 DS25BR120 3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis 数据表 (Rev. E) 2013年 4月 14日
应用手册 低压差分信号 (LVDS) 在 LED 灯墙中的应用 英语版 2022年 5月 19日
应用手册 Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 2019年 6月 29日
应用手册 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A) 2013年 4月 29日
应用手册 AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A) 2013年 4月 26日
用户指南 3.125 Gbps LVDS Buffers with Pre-emphasis and Equalization User Guide 2012年 1月 25日
应用手册 LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (cn) 最新英语版本 (Rev.A) 2008年 9月 4日

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DS25BR100EVK — 具有发送预强调和接收均衡功能的 3.125 Gbps LVDS 单通道缓冲器系列

The DS25BR100EVK is an evaluation kit designed for demonstrating performance of the 3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-Emphasis (PE) and Receive Equalization (EQ) family (DS25BR100, DS25BR110 and DS25BR120). The evaluation kit provides all three devices on a single board and (...)

用户指南: PDF
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仿真模型

DS25BR120 IBIS Model

SNLM098.ZIP (12 KB) - IBIS Model
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用户指南: PDF
英语版 (Rev.A): PDF
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  • MTBF/时基故障估算
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