10 位 165MSPS SpeedPlus™ DAC,可伸缩电流输出在 2mA 与 20mA 之间

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产品详细信息

参数

Resolution (Bits) 10 DAC channels 1 Interface Parallel CMOS Sample/update rate (MSPS) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (Typ) (mW) 170 SFDR (dB) 76 Architecture Current Source Operating temperature range (C) -40 to 85 Reference: type Ext, Int open-in-new 查找其它 高速 DACs (>10MSPS)

封装|引脚|尺寸

SOIC (DW) 28 184 mm² 17.9 x 10.3 TSSOP (PW) 28 62 mm² 9.7 x 6.4 open-in-new 查找其它 高速 DACs (>10MSPS)

特性

  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

open-in-new 查找其它 高速 DACs (>10MSPS)

描述

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC900 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.

The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.

open-in-new 查找其它 高速 DACs (>10MSPS)
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技术文档

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类型 标题 下载最新的英文版本 发布
* 数据表 DAC900: 10-Bit, 165MSPS Digital-to-Analog Converters 数据表 2002年 5月 29日
用户指南 DAC90x User's Guide 2017年 8月 8日
技术文章 Digital signal processing in RF sampling DACs – part 2 2017年 4月 4日
技术文章 Digital signal processing in RF sampling DACs - part 1 2017年 2月 13日
技术文章 Why phase noise matters in RF sampling converters 2016年 11月 28日
技术文章 RF sampling: frequency planning yields a clean spectrum 2015年 11月 18日
应用手册 Wideband Complementary Current Output DAC Single-Ended Interface 2015年 5月 8日
应用手册 High Speed, Digital-to-Analog Converters Basics 2012年 10月 23日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 高速数据转换 下载英文版本 2008年 10月 16日
用户指南 DEM-DAC90x: Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908 2000年 9月 27日

设计与开发

有关其他条款或所需资源,请点击下面的任何链接来查看详情页面。

硬件开发

评估板 下载
document-generic 用户指南
$199.00
说明
DAC900 评估模块 (EVM) 适用于评估 10 位高速
CMOS 接口 DAC900。该 EVM 只需极少的简单外部组件,更大限度地降低了系统成本和功耗。
特性
  • 支持多路输出配置
  • 直接兼容 TSW1400EVM
  • 缓冲输入进入数模转换器 (DAC)
  • 可选择的内部或外部 Vref

设计工具和仿真

仿真模型 下载
SLWC072.ZIP (6 KB) - IBIS Model
仿真模型 下载
SLWC073.ZIP (5 KB) - IBIS Model
计算工具 下载
GERBER 文件 下载
SBAC225.ZIP (1677 KB)

CAD/CAE 符号

封装 引脚 下载
SOIC (DW) 28 了解详情
TSSOP (PW) 28 了解详情

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