CD4532B

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CMOS 8 位优先级编码器

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数据表

document-pdfAcrobat CD4532B TYPES 数据表 (Rev. C) (英语)

CD4532B

正在供货

数据表

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产品详情

Technology family

CD4000

Function

Encoder

Configuration

8:3

Number of channels

1

Operating temperature range (°C)

-55 to 125

Rating

Catalog

Technology family

CD4000

Function

Encoder

Configuration

8:3

Number of channels

1

Operating temperature range (°C)

-55 to 125

Rating

Catalog

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SOP (NS)

16

79.56 mm² 10.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

Converts from 1 of 8 to binary
Provides cascading feature to handle any number of inputs
Group select indicates one or more priority inputs
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range):
     0.5 V at V_DD = 5 V
     1.5 V at V_DD = 10 V
     1.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Applications:
- Priority encoder
- Binary or BCD encoder (keyboard encoding)
- Floating point arithmetic

Data sheet acquired from Harris Semiconductor

Converts from 1 of 8 to binary
Provides cascading feature to handle any number of inputs
Group select indicates one or more priority inputs
Standardized, symmetrical output characteristics
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
Noise margin (full package-temperature range):
     0.5 V at V_DD = 5 V
     1.5 V at V_DD = 10 V
     1.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
Applications:
- Priority encoder
- Binary or BCD encoder (keyboard encoding)
- Floating point arithmetic

Data sheet acquired from Harris Semiconductor

CD4532B consists of combinational logic that encodes the highest priority input (D7-D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input E_I is low. When E_I is high, the binary representation of the highest-priority input appears on output lines Q2-Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (E_O) is high when no priority inputs are present. If any one input is high, E_O is low and all cascaded lower-order stages are disabled.

The CD4532B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4532B consists of combinational logic that encodes the highest priority input (D7-D0) to a 3-bit binary code. The eight inputs, D7 through D0, each have an assigned priority; D7 is the highest priority and D0 is the lowest. The priority encoder is inhibited when the chip-enable input E_I is low. When E_I is high, the binary representation of the highest-priority input appears on output lines Q2-Q0, and the group select line GS is high to indicate that priority inputs are present. The enable-out (E_O) is high when no priority inputs are present. If any one input is high, E_O is low and all cascaded lower-order stages are disabled.

The CD4532B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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