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Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 5 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 14 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
Configuration 16:1 Number of channels 1 Power supply voltage - single (V) 3.3, 5, 12, 16, 20 Power supply voltage - dual (V) +/-10, +/-2.5, +/-5 Protocols Analog Ron (typ) (Ω) 125 CON (typ) (pF) 5 Supply current (typ) (µA) 0.04 Bandwidth (MHz) 14 Operating temperature range (°C) -55 to 125 Input/output continuous current (max) (mA) 10 Rating Catalog Drain supply voltage (max) (V) 18 Supply voltage (max) (V) 18 Negative rail supply voltage (max) (V) 0
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4
  • Low ON resistance: 125 (typ.) over 15 Vp-p signal-input range for VDD - VSS = 15 V
  • High OFF resistance: channel leakage of ±10 pA (typ.) @ VDD - VSS = 10 V
  • Matched switch characteristics: RON = 5 (typ.) for VDD - VSS = 15 V
  • Very low quiescent power dissipation under all digital-control input and supply conditions: 0.2 uW (typ.) @ VDD - VSS = 10 V
  • Binary address decoding on chip
  • 5-V, 10-V, and 15-V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Analog and digital multiplexing and demultiplexing
    • A/D and D/A conversion
    • Siganl gating

* When these devices are used as demultiplexers, the channel in/out terminals are the outputs and the common out/in terminals are the inputs.

  • Low ON resistance: 125 (typ.) over 15 Vp-p signal-input range for VDD - VSS = 15 V
  • High OFF resistance: channel leakage of ±10 pA (typ.) @ VDD - VSS = 10 V
  • Matched switch characteristics: RON = 5 (typ.) for VDD - VSS = 15 V
  • Very low quiescent power dissipation under all digital-control input and supply conditions: 0.2 uW (typ.) @ VDD - VSS = 10 V
  • Binary address decoding on chip
  • 5-V, 10-V, and 15-V parametric ratings
  • 100% tested for quiescent current at 20 V
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13A, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Analog and digital multiplexing and demultiplexing
    • A/D and D/A conversion
    • Siganl gating

* When these devices are used as demultiplexers, the channel in/out terminals are the outputs and the common out/in terminals are the inputs.

CD4067B and CD4097B CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range. The CD4067B is a 16-channel multiplexer with four binary control inputs, A, B, C, D, and an inhibit input, arranged so that any combination of the inputs selects one switch.

The CD4097B is a differential 8-channel multiplexer having three binary control inputs, A, B, C, and an inhibit input. The inputs permit selection of one of eight pairs of switches.

A logic "1" present at the inhibit input turns all channels off.

The CD4067B and CD4097B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (P and PWR suffixes).

CD4067B and CD4097B CMOS analog multiplexers/demultiplexers* are digitally controlled analog switches having low ON impedance, low OFF leakage current, and internal address decoding. In addition, the ON resistance is relatively constant over the full input-signal range. The CD4067B is a 16-channel multiplexer with four binary control inputs, A, B, C, D, and an inhibit input, arranged so that any combination of the inputs selects one switch.

The CD4097B is a differential 8-channel multiplexer having three binary control inputs, A, B, C, and an inhibit input. The inputs permit selection of one of eight pairs of switches.

A logic "1" present at the inhibit input turns all channels off.

The CD4067B and CD4097B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (P and PWR suffixes).

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类型 项目标题 下载最新的英语版本 日期
* 数据表 CD4067B, CD4097B TYPES 数据表 (Rev. B) 2003年 6月 16日
应用手册 选择正确的德州仪器 (TI) 信号开关 (Rev. E) PDF | HTML 下载英文版本 (Rev.E) PDF | HTML 2022年 8月 5日
应用手册 多路复用器和信号开关词汇表 (Rev. B) 下载英文版本 (Rev.B) PDF | HTML 2022年 3月 11日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 下载最新的英文版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用户指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
应用手册 Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 2001年 12月 3日

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TSSOP (PW) 24 了解详情

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