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ADC3910D025 正在供货 具有单时钟周期延迟、高达 16 倍抽取率以及数字比较器的 10 位双通道 25MSPS ADC Lower power and smaller package size

产品详情

Sample rate (max) (Msps) 20 Resolution (bps) 10 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 140 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 150 Architecture Two-Step SNR (dB) 59 ENOB (bit) 9.5 SFDR (dB) 76 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 20 Resolution (bps) 10 Number of input channels 2 Interface type Parallel CMOS, TTL Analog input BW (MHz) 140 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 150 Architecture Two-Step SNR (dB) 59 ENOB (bit) 9.5 SFDR (dB) 76 Operating temperature range (°C) -40 to 85 Input buffer No
TQFP (PFB) 48 81 mm² 9 x 9
  • Internal Sample-and-Hold
  • Internal Reference Capability
  • Dual Gain Settings
  • Offset Correction
  • Selectable Offset Binary or 2's Complement Output
  • Multiplexed or Parallel Output Bus
  • Single +2.7V to 3.6V Operation
  • Power Down and Standby Modes

Key Specifications

  • Resolution 10 Bits
  • Conversion Rate 20 MSPS
  • ENOB 9.5 Bits (typ)
  • DNL 0.35 LSB (typ)
  • Conversion Latency Parallel Outputs 2.5 Clock Cycles
  • Multiplexed Outputs, I Data Bus 2.5 Clock Cycles
  • Multiplexed Outputs, Q Data Bus 3 Clock Cycles
  • PSRR 90 dB
  • Power Consumption—Normal Operation 150 mW (typ)
  • Power Down Mode <1 mW (typ)
  • Fast Recovery Standby Mode 27 mW (typ)

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  • Internal Sample-and-Hold
  • Internal Reference Capability
  • Dual Gain Settings
  • Offset Correction
  • Selectable Offset Binary or 2's Complement Output
  • Multiplexed or Parallel Output Bus
  • Single +2.7V to 3.6V Operation
  • Power Down and Standby Modes

Key Specifications

  • Resolution 10 Bits
  • Conversion Rate 20 MSPS
  • ENOB 9.5 Bits (typ)
  • DNL 0.35 LSB (typ)
  • Conversion Latency Parallel Outputs 2.5 Clock Cycles
  • Multiplexed Outputs, I Data Bus 2.5 Clock Cycles
  • Multiplexed Outputs, Q Data Bus 3 Clock Cycles
  • PSRR 90 dB
  • Power Consumption—Normal Operation 150 mW (typ)
  • Power Down Mode <1 mW (typ)
  • Fast Recovery Standby Mode 27 mW (typ)

All trademarks are the property of their respective owners.

The ADC10D020 is a dual low power, high performance CMOS analog-to-digital converter that digitizes signals to 10 bits resolution at sampling rates up to 30 MSPS while consuming a typical 150 mW from a single 3.0V supply. No missing codes is ensured over the full operating temperature range. The unique two stage architecture achieves 9.5 Effective Bits over the entire Nyquist band at 20 MHz sample rate. An output formatting choice of offset binary or 2's complement coding and a choice of two gain settings eases the interface to many systems. Also allowing great flexibility of use is a selectable 10-bit multiplexed or 20-bit parallel output mode. An offset correction feature minimizes the offset error.

To ease interfacing to most low voltage systems, the digital output power pins of the ADC10D020 can be tied to a separate supply voltage of 1.5V to 3.6V, making the outputs compatible with other low voltage systems. When not converting, power consumption can be reduced by pulling the PD (Power Down) pin high, placing the converter into a low power state where it typically consumes less than 1 mW and from which recovery is less than 1 ms. Bringing the STBY (Standby) pin high places the converter into a standby mode where power consumption is about 27 mW and from which recovery is 800 ns.

The ADC10D020's speed, resolution and single supply operation makes it well suited for a variety of applications, including high speed portable applications.

Operating over the industrial (−40° ≤ TA ≤ +85°C) temperature range, the ADC10D020 is available in a 48-pin TQFP package. An evaluation board is available to ease the design effort.

The ADC10D020 is a dual low power, high performance CMOS analog-to-digital converter that digitizes signals to 10 bits resolution at sampling rates up to 30 MSPS while consuming a typical 150 mW from a single 3.0V supply. No missing codes is ensured over the full operating temperature range. The unique two stage architecture achieves 9.5 Effective Bits over the entire Nyquist band at 20 MHz sample rate. An output formatting choice of offset binary or 2's complement coding and a choice of two gain settings eases the interface to many systems. Also allowing great flexibility of use is a selectable 10-bit multiplexed or 20-bit parallel output mode. An offset correction feature minimizes the offset error.

To ease interfacing to most low voltage systems, the digital output power pins of the ADC10D020 can be tied to a separate supply voltage of 1.5V to 3.6V, making the outputs compatible with other low voltage systems. When not converting, power consumption can be reduced by pulling the PD (Power Down) pin high, placing the converter into a low power state where it typically consumes less than 1 mW and from which recovery is less than 1 ms. Bringing the STBY (Standby) pin high places the converter into a standby mode where power consumption is about 27 mW and from which recovery is 800 ns.

The ADC10D020's speed, resolution and single supply operation makes it well suited for a variety of applications, including high speed portable applications.

Operating over the industrial (−40° ≤ TA ≤ +85°C) temperature range, the ADC10D020 is available in a 48-pin TQFP package. An evaluation board is available to ease the design effort.

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类型 标题 下载最新的英语版本 日期
* 数据表 ADC10D020 Dual 10-Bit, 20 MSPS, 150 mW A/D Converter 数据表 (Rev. D) 2013年 3月 4日

设计和开发

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仿真模型

ADC10D020 IBIS Model

SNAM009.ZIP (4 KB) - IBIS Model
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封装 引脚 CAD 符号、封装和 3D 模型
TQFP (PFB) 48 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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