ADC08DL500
Key Specifications
Resolution | 8 Bits |
Max Conversion Rate | 500 MSPS |
Code Error Rate | 10 |
ENOB @ 125 MHz Input | 7.2 Bits (typ) |
DNL | ±0.15 LSB (typ) |
Operating in 1:2 Demux Output | 1.25W (typ) |
Power Down Mode | 3.3 mW (typ) |
The ADC08DL500 is a dual, low power, high performance, CMOS analog-to-digital converter. The ADC08DL500 digitizes signals to 8 bits of resolution at sample rates up to 500 MSPS. Consuming a typical 1.2 Watts in demultiplex mode at 500 MSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.2
The converter typically consumes 3.3 mW in the Power Down Mode and is available in a lead-free 144-lead LQFP and operates over the modified Industrial (-40°C
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | ADC08DL500 Low Power, 8-Bit, Dual 500 MSPS A/D Converter 数据表 (Rev. C) | 2011年 3月 25日 |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点