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Resolution (Bits) 8 Sample rate (max) (ksps) 10 Number of input channels 1 Interface type Parallel Architecture SAR Input type Differential Rating Catalog Reference mode External, Supply Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) 0 to 70 Power consumption (typ) (mW) 5.5 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
Resolution (Bits) 8 Sample rate (max) (ksps) 10 Number of input channels 1 Interface type Parallel Architecture SAR Input type Differential Rating Catalog Reference mode External, Supply Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) 0 to 70 Power consumption (typ) (mW) 5.5 Analog supply (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.5 Digital supply (max) (V) 5.5
SOIC (DW) 20 131.84 mm² 12.8 x 10.3
  • Compatible With 8080-µP Derivatives – No
    Interfacing Logic Needed – Access Time 135 ns
  • Easy Interface to All Microprocessors, or Operates
    as a Stand-Alone Deivce
  • Differential Analog Voltage Inputs
  • Logic Inputs and Outputs Meet Both MOS and
    TTL Voltage-Level Specifications
  • Works With 2.5-V (LM336) Voltage Reference
  • On-Chip Clock Generator
  • 0-V to 5-V Analog Input Voltage Range With
    Single 5-V Supply
  • No Zero Adjust Required
  • 0.3-Inch Standard Width 20-Pin DIP Package
  • 20-Pin Molded Chip Carrier or Small Outline
    Package
  • Operates Ratiometrically or With 5 VDC, 2.5 VDC,
    or Analog Span Adjusted Voltage Reference
  • Key Specifications
    • Resolution: 8 Bits
    • Total Error: ±1/4 LSB, ±1/2 LSB and ±1 LSB
    • Conversion Time: 100 µs
  • Compatible With 8080-µP Derivatives – No
    Interfacing Logic Needed – Access Time 135 ns
  • Easy Interface to All Microprocessors, or Operates
    as a Stand-Alone Deivce
  • Differential Analog Voltage Inputs
  • Logic Inputs and Outputs Meet Both MOS and
    TTL Voltage-Level Specifications
  • Works With 2.5-V (LM336) Voltage Reference
  • On-Chip Clock Generator
  • 0-V to 5-V Analog Input Voltage Range With
    Single 5-V Supply
  • No Zero Adjust Required
  • 0.3-Inch Standard Width 20-Pin DIP Package
  • 20-Pin Molded Chip Carrier or Small Outline
    Package
  • Operates Ratiometrically or With 5 VDC, 2.5 VDC,
    or Analog Span Adjusted Voltage Reference
  • Key Specifications
    • Resolution: 8 Bits
    • Total Error: ±1/4 LSB, ±1/2 LSB and ±1 LSB
    • Conversion Time: 100 µs

The ADC0801, ADC0802, ADC0803, ADC0804, and ADC0805 devices are CMOS 8-bit successive approximation converters (ADC) that use a differential potentiometric ladder – similar to the 256R products. These converters are designed to allow operation with the NSC800 and INS8080A derivative control bus with Tri-state output latches directly driving the data bus. These ADCs appear like memory locations or I/O ports to the microprocessor and no interfacing logic is needed.

Differential analog voltage inputs allow increasing the common-mode rejection and offsetting the analog zero input voltage value. In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits of resolution.

The ADC0801, ADC0802, ADC0803, ADC0804, and ADC0805 devices are CMOS 8-bit successive approximation converters (ADC) that use a differential potentiometric ladder – similar to the 256R products. These converters are designed to allow operation with the NSC800 and INS8080A derivative control bus with Tri-state output latches directly driving the data bus. These ADCs appear like memory locations or I/O ports to the microprocessor and no interfacing logic is needed.

Differential analog voltage inputs allow increasing the common-mode rejection and offsetting the analog zero input voltage value. In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits of resolution.

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* 数据表 ADC080x 8-Bit, µP-Compatible, Analog-to-Digital Converters 数据表 (Rev. C) PDF | HTML 2015年 6月 29日
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