74ACT16841DL

正在供货

具有三态输出的 20 位总线接口 D 类锁存器 | DL | 56 | -40 to 85

等同于: 74ACT16841DL.A 该器件型号与上面所列的器件型号相同。您只能订购上述器件型号的对应数量。
  • 库存:
    限制: 此限制是为了保护样片库存以支持客户设计评估阶段使用,将会在库存充裕时取消此限制。
缺货
Not available

定价

数量 价格
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质量信息

等级 Catalog
RoHS Yes
REACH Yes
引脚镀层/焊球材料 NiPdAu
MSL 等级/回流焊峰值温度 Level-1-260C-UNLIM
质量、可靠性
和封装信息

包含信息:

  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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更多制造信息

包含信息:

  • 制造厂地点
  • 封装厂地点
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出口管制分类

*仅供参考

  • 美国 ECCN:EAR99

更多 74ACT16841 信息

封装信息

封装 | 引脚 SSOP (DL) | 56
工作温度范围 (°C) -40 to 85
包装数量 | 包装 20 | TUBE

74ACT16841 的特性

  • Members of the Texas Instruments WidebusTM Family
  • Inputs Are TTL-Voltage Compatible
  • 3-State Outputs Drive Bus Lines Directly
  • Provide Extra Bus Driving/Latches Necessary for Wider Address/Data Paths or Buses With Parity
  • Flow-Through Architecture Optimizes PCB Layout
  • Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Thin Shrink Small-Outline (DGG) Packages, 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings

 

EPIC and Widebus are trademarks of Texas Instruments Incorporated.

74ACT16841 的说明

These 20-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The 'ACT16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable (1 or 2) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The 74ACT16841 is packaged in TI's shrink small-outline package (DL), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

The 54ACT16841 is characterized for operation over the full military temperature range of -55°C to 125°C. The 74ACT16841 is characterized for operation from -40°C to 85°C.

 

 

  • 库存:
    限制: 此限制是为了保护样片库存以支持客户设计评估阶段使用,将会在库存充裕时取消此限制。
缺货
Not available

定价

数量 价格
—
—
—
+

包装类型

您可以根据器件数量选择不同的包装方式,包括完整卷带、定制卷带、剪切带、管装或托盘。

定制卷带是从整盘卷带上剪下来的具有连续长度的剪切带,是一种可以对特定数量提供产品批次及生产日期跟踪的包装方式。根据行业标准,使用黄铜垫片在剪切带两端各连接一个 18 英寸的引带和尾带,以直接送入自动组装机。涉及定制卷带的 TI 订单将包含卷带费用。

剪切带是从整盘卷带上剪下来的特定长度的编带。根据所申请器件数量的不同,TI 可能会使用多条剪切带或多个盒子进行包装。

TI 通常会根据库存情况选择将管装或托盘器件以盒装或者管装或托盘形式发货。所有器件均会按照 TI 内部规定的静电放电和湿敏等级保护要求进行包装。

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可提供批次和生产日期代码选项

您可在购物车中添加器件数量以开始结算流程,并查看现有库存中可选择批次或生产日期代码的选项。

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