SLUAAL3 July 2022 UCC28C50-Q1 , UCC28C51-Q1 , UCC28C52-Q1 , UCC28C53-Q1 , UCC28C54-Q1 , UCC28C55-Q1 , UCC28C56H-Q1 , UCC28C56L-Q1 , UCC28C57H-Q1 , UCC28C57L-Q1 , UCC28C59-Q1
A high-voltage to low-voltage backup auxiliary power supply has become prevalent in automotive powertrain applications. This application report discusses key considerations and design guidelines for the backup power supply such as the operating voltage of the switching device, startup circuitry, noise coupling, and high-voltage isolation.
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The traction inverter efficiently converts DC power from a high-voltage battery to alternating phases of power needed to drive multi-phase motors. Galvanic isolation is required to protect people, as well as the low-voltage components on the cold side of the system, from the high-voltage traction inverter on the hot side of the system. As automotive applications continue to trend in the direction of increased safety, it has become more common to include a high-voltage to low-voltage backup supply in the traction inverter system. The backup power supply powers the low-voltage components if the 12-V battery fails. Figure 1-1 displays an example block diagram featuring the high-voltage to low-voltage redundant power supply.
Also, Silicon Carbide (SiC) MOSFETs are becoming more and more prevalent in the industry too. For an 800VTYP EV/HEV battery system, the primary-side switching device of the isolated bias supply once required two silicon MOSFETs in a cascode configuration. The cascode configuration is employed in TI’s PMP41009 reference design. Those two MOSFETs can now be replaced by a single 1700V SiC MOSFET saving component cost, condensing PCB area, and reducing losses to produce higher efficiency.
To operate efficiently with their lowest RDS,ON, SiC MOSFETs require higher gate drive voltages than silicon MOSFETs. To drive SiC MOSFETs reliably and efficiently, Texas Instruments has introduced the new auto-grade UCC28C5x current-mode PWM controllers with higher ABS MAX voltage of the VDD pin (30V) and additional/increased options for the UVLO Start/Stop thresholds, VDDON and VDDOFF in the data sheet. With 30 V VDD rating, the gate drive voltage at the OUT pin can easily be adjusted to support a variety of SiC MOSFETs with different optimal gate voltage levels, such as 20 V, 18 V, or 15 V. A proper VDDOFF level is also a very critical consideration to avoid the risk of thermal runaway issue of SiC MOSFETs. Compared to the UCC28C4x family, other improvements include reduced startup and operating currents, and improved accuracy of the reference voltage.
Table 1-1 and Table 1-2 are summaries of the new UCC28C5x-Q1 controllers dedicated to SiC MOSFET applications and their enhancements over the preceeding UCC28C4x-Q1 family.
UVLO | Maximum Duty Cycle | Temperature (TJ) | ||
---|---|---|---|---|
Turn On at 18.8
V Turn Off at 15.5 V Suitable for 20-VGS SiC MOSFETs |
Turn On at 18.8
V Turn Off at 14.5V Suitable for 18-VGS SiC MOSFETs |
Turn On at 16 V
Turn Off at 12.5V Suitable for 15-VGS SiC MOSFETs |
||
UCC28C56H-Q1 | UCC28C56L-Q1 | UCC28C58-Q1 | 100% | –40°C to 150°C |
UCC28C57H-Q1 | UCC28C57L-Q1 | UCC28C59-Q1 | 50% |
Parameter | UCC28C4x-Q1 | UCC28C5x-Q1 |
---|---|---|
Supply current at 52 kHz | 2.3 mA | 1.3 mA |
Start-up current | 100 µA | 75 µA |
VDD absolute maximum | 20 V | 30 V |
Reference voltage accuracy | ± 2% | ± 1% |
UVLO and DMAX for Si MOSFET | 6 options | 6 options |
UVLO and DMAX for SiC MOSFET | no options | 6 options |
The high-voltage to low-voltage backup supply presents new challenges compared to the low-input voltage flyback converters tapped from the 12-V battery that currently dominate HEV and EV powertrains. The high-voltage input flyback converter needs to support ultra-wide input voltages. The backup supply needs to operate down to 40 V to support functional safety tests during regenerative braking of the traction motor. This enables engineers and mechanics to work safely. The second safety critical scenario is when the car is towed or pushed (maybe during an accident). In this case the motor becomes a generator and charges up the high voltage input bus capacitor of the traction inverter. In both cases, the backup supply needs to start operation relatively fast to provide the bias power to the isolated gate driver such that the drivers can short the motor windings and prevent the bus capacitor from charging above 60 V. These considerations require the total startup time of the backup supply to be hundreds of milli-seconds, across the range of input voltages.
A 1000 V maximum input-voltage is usually required in 800-V battery systems, considering the battery charged voltage, the AC ripple through the harness, and design margin. Additional challenges, which arise from operating off the high-voltage battery, are selecting a high-voltage power device, minimizing start-up losses, minimizing noise coupling, and ensuring the system meets safety standards.
The flyback topology is the most popular redundant power supply solution due to a low cost, and the ability to support a wide input-voltage range. A controller from the recently expanded and improved UCC28C5x-Q1 family is well suited for this application. When designing a redundant, flyback power supply, all of these design requirements must be addressed.
The maximum input voltage must be considered when selecting the power device, since the maximum switch node voltage of the flyback converter is the summation of the input voltage, the reflected output voltage, and the voltage spike. For 800-V battery systems, Silicon Carbide (SiC) MOSFETS are becoming more popular due to their improved figure of merit (FOM) and their high voltage rating, typically 1700 V. Even though there are 1500-V or 1700-V rated silicon MOSFETs on the market, their poor FOM, non-availability of auto-grade, high unit cost, and limited suppliers makes 1.7-kV SiC MOSFETs the more preferable option. Table 2-1 compares the critical parameters between a Si MOSFET and two SiC MOSFETs and quantifies the efficiency gains achieved by the SiC MOSFETs.
Careful consideration must be given to the UVLO turn-off threshold of the SiC-based flyback controller, because it is not only the minimum operating voltage of the controller, but also the gate drive voltage for the SiC MOSFET. For example, a UVLO turn-off greater than 15 V for a 20-VGS SiC MOSFET is recommended to provide increased reliability of the device. Gate drive voltages less than 15 V can cause the power device to operate in the negative temperature coefficient region of turn-on resistance and lose the current balance nature among the clustered cells. This usually results in a thermal runaway issue. Similarly, for 18-VGS or 15-VGS SiC MOSFETs it is highly recommended to maintain the gate drive voltage higher than 14 V and 12 V, respectively.
Parameter | 1.7-kV Si MOSFET (STW12N170K5) |
1.7-kV SiC MOSFET (G2R1000MT17D) |
Efficiency Gain Due To SiC MOSFET |
---|---|---|---|
RDS,ON
at TJ=125°C |
2.2 Ωat 10 VGS | 1.2 Ω at 20 VGS | 45% lower conduction loss |
Gate Charge QG |
37 nC at 10 VGS | 11.0 nC at 20 VGS | 40% lower gate drive loss |
COSS(ER)
at VDS = 1 kV |
26 pF | 19 pF | >23% lower turn-on loss |
To satisfy functional safety during the regenerative braking test and to limit the bus voltage from charging above an unsafe level when the vehicle is towed or pushed, the auxiliary supply must have a total startup time on the order of hundreds of milliseconds. If the controller uses a simple high voltage resistor string to bias VDD during startup, low resistance is needed to charge the VDD capacitor above the controller UVLO threshold. The resistor string will continue to consume power during normal operation, which reduces efficiency and increases standby power. Standby power is a critical requirement in battery-operated systems since it affects the range of an electric vehicle. Therefore, an external, active start-up circuit is recommended.
Figure 3-1 shows a well-known active start-up circuit using a high-voltage BJT (or enhancement-mode MOSFET) with 1.2-kV voltage rating or above. Figure 3-2 shows a novel, alternative startup circuit with two 600-V depletion mode MOSFETs in series. The following discussion will briefly discuss the design and operation of each circuit and then provide comparisons.
To power up at low VIN (40 V) within the maximum startup time (tSS, MAX), the NPN-based active startup circuit must provide high enough startup current to charge the VDD capacitor (C12) above VDDON and also deliver the startup current of the PWM controller, ISTART-UP(Controller). This startup requirement sets the maximum value of the total current limiting resistance (RC,MAX) connected from VIN to the collector of the NPN. The trade-off is the resistor size and cost to handle the pulsed current, especially at high VIN (1000V).
During component selection, surge rated resistors with relatively high power handling capability are needed, such as the CRGP Series from TE Connectivity. The 2010 size resistor (typically 1.25 W) from this series is rated for 20-30 W for 100 ms. The collector resistors must be chosen to withstand the power dissipated at the highest VIN (1000 V). Also, multiple resistors in series are required to distribute the maximum input voltage without exceeding the individual voltage rating of each resistor (200 V per resistor).
Lastly, the NPN transistor must receive adequate base current and have a high enough current gain to deliver the previously mentioned current to the VDD capacitor at low VIN. The base current, derived from a second resistor string, increases the standby power and the total power loss of the circuit shown in Figure 3-1 at 1 kV is (1 kV)2 / (6x 750 kΩ) = 220 mW. To guarantee high current gain for lowering power consumption from base current at high VIN and for providing sufficient collector current at low VIN a Darlington transistor was selected, rated for 1.2 kV. Due to the special component selection, the smallest package size option is TO-220, which is over-sized for high voltage startup function. Besides, the component cost and footprint are compromised as well.
The circuit in Figure 3-2 utilizes two 600V depletion mode MOSFETs (2x BSS126). The depletion mode MOSFET conducts when no gate voltage is applied and begins to turn off as the VGS voltage becomes more and more negative. It is completely off when VGS is below the turn-off threshold. The characteristics of the depletion mode FET make it well suited to implementing a current source for high-voltage startup. It is difficult to find a low-cost and small-size depletion MOSFET with 1.2-kV rating, but there are wide variety of selection in 600V to 800V domain. Therefore, the new stacked depletion MOSFET configuration with the proposed gate clamp circuit will evenly distribute the voltage stress from the 1 kV input voltage.
First, let’s look at the operation of Q1. Notice the four 130-V Zener diodes; D2, D4, D6 and D8. Their combined Zener voltage is 520 V. Next, think of R1 as a pull-up resistor to VIN that provides current to the Zener diodes. With that in mind, it’s obvious that these diodes will be off if VIN < 520V. Now, as VIN rises above 520 V, the voltage at the source of Q1 will be clamped slightly above 520 V, let’s say 521 V. In effect Q1 is biased such that the maximum voltage presented to Q2 is 521 V. The VDS voltage of Q1 is VIN – 520 V. At 1000 VIN the VDS of Q2 will be 521 V and VDS of Q1 will be 479 V.
Next, let’s look at the operation of Q2. For now, let’s say D5 is a 22-V redundant (safety) clamp to limit the maximum value of VDD in case Q3 were in a single fault situation and could not shut down Q2. So, for normal operation it’s practical to assume D5 is off. When VDD < VDD,ON, Q3 is also off because the controller has not been powered up and VREF = 0V. R3 is a pull-up resistor (similar to R1 for Q1) that biases D9 on in the forward direction during HV startup. As shown in Figure 3-3, the majority of current flows from the source of Q2 through R5 and charges the 22 µF capacitor on VDD. We can draw the following diagram and use KVL around the loop formed by R3, D9, and R5. Then, the soft start time requirement sets the maximum value of R5, the current limiting resistor.
Typical values for VF(D9) and VTH(Q2) are 0.3 V and 1.0 V, respectively. With this information we can solve for Io: (0.3 V + 1.0 V) / 1 kΩ = 1.3 mA. Notice this current does not depend on VIN so it will be constant over the entire range of VIN. The power dissipated by the current limit resistor, (1.3 mA)2 x 1 kΩ = 1.7 mW, is very low for the entire VIN range so the resistor can be quite small, 0603 size.
In both the NPN and Depletion Mode circuits, Q3 functions as a simple switch controlled by VREF from the controller to shut down the HV startup circuit. When Q3 turns on Zener diode D9 is reverse biased and clamps the VGS voltage of Q2 to about ‒18 V. In all cases, shutting down the HV startup circuit reduces power and improves efficiency. Biasing the zener string only requires few µA. The power consumption of Figure 3-2 can be derived as [VTH(Q1) / R1 + VTH(Q2) / R3] x VIN. For 1-V VTH and a 1 MΩ resistors, the power loss at 1 kV is only 1 mW. Compared to the 220 mW consumption of the NPN startup circuit, the standby power is greatly reduced.
C4 is a feedforward capacitor from VIN to the (520-V) zener string. This capacitor speeds up the zener string response in the event VIN changes very quickly (dVIN/dt < 10 V/ns) to maintain even distribution of the voltage stress between the two depletion mode MOSFETs. This capacitor typically should be 1-2 pF, but should be rated for at least 630 V.
Figure 3-4 is a simulation of the depletion mode startup circuitry with VIN ramping up to 800 V in 100 ms. Notice the VDS of Q1 is limited to 280 V and VDS of Q2 is limited to 520 V (the total Zener voltage). Also, the output current is 1.34 mA, as predicted. The VDD voltage rises linearly for 300 ms to 18.27 V.
Figure 3-5 is a simulation when Q3 does not turn on due to single fault event. VDD and VSG_Q2 rise until the 22-V Zener (D5) turns on. At this instant VDD is limited to 22.7 V, a benign value. Without D5 the VDD voltage would rise to a destructive voltage.
The waveforms in Figure 3-6 to Figure 3-9 are plots measured for both the NPN and Depletion Mode active startup circuits at 50 VIN, 1.3-A load and 800 VIN, 2.7-A load. The total startup time of the NPN based circuit varies from 254 ms at 50 VIN to only 44ms at 800 VIN, a change of 210 ms. The startup time of the Depletion Mode circuit varies from 254 ms to 243 ms, a change of only 11 ms (4.3%)! The performance of the Depletion Mode circuit correlates very well to the simulations.
Total soft start time is 254 ms. |
Total soft start time is 254 ms. |
Total soft start time is 44ms, ∆= -210 ms. |
Total soft start time is 243 ms, ∆= -11 ms. |
Figure 3-10 and Figure 3-11 are physical comparisons of components required for the NPN and Depletion Mode HV startup circuits. The NPN active startup components require 0.64 in2. The depletion mode active startup components require only 0.19 in2. The NPN based circuitry requires at least 3.4x the PCB area, probably more after placing and routing the higher current traces associated with the NPN circuit. Note: the shutdown FET (Q3) and its associated components are common to both solutions so it was omitted from the comparisons.
Table 3-1 is a cost comparison between the NPN and Depletion Mode HV startup circuits.
COMPONENT | UNIT COST | NPN-BASED CIRCUIT | DEPLETION MODE CIRCUIT |
---|---|---|---|
1.2-kV NPN in TO-220 | $1.10 | 1 | |
600-V depletion mode MOSFETs in SOT-23 | $0.12 | 2 | |
2010-size surge-rated resistors | $0.05 | 6 | |
1206-size resistors | $0.015 | 6 | |
0603-size resistors | $0.005 | 3 | |
Zener/Schottky diode in SOD-223 | $0.04 | 2 | 6 |
1206-size 630-V capacitor | $0.04 | 1 | |
Total Cost: | $1.57 | $0.54 |
High-voltage and fast switching leads to a high dv/dt switching node, which generates a fair amount of noise. During PCB layout, the switching node must be kept away from quiet areas, such as the current sense circuitry, voltage feedback circuitry, and loop compensation components to reduce noise coupling.
It’s common knowledge that each time the MOSFET turns on a spike appears on the current sense resistor for a very short time. This spike can cause the MOSFET to turn off early if precautions are not taken. The following figure shows several important sub-circuits required for reliable operation. First, and most important, R21 and C22 form a low pass filter between the (noisy) Rsense node and the CS pin. The low pass filter will attenuate most of the noise spike but too much filtering will delay the current information too. Second, Q6 and the components connected to its base are leading-edge blanking (LEB). This AC-coupled transistor pulls down on the CS voltage each time the MOSFET is turned on. The amount of leading-edge blanking is determined by C23, R26, and R27.
At duty cycles above 50%, current mode control in continuous conduction mode (CCM) is known to suffer from a subharmonic oscillation (instability) unless slope compensation is added. Since the backup power supply operates in wide input voltage range, the duty cycle can easily go above 50% and the converter runs into CCM at low input voltage condition. In Figure 4-1, R22 injects a small amount of voltage ramp to the CS pin. The voltage ramp for slope compensation is formed by passing the RT/CT voltage through an emitter-follower formed by Q7 and R23. The emitter follower buffers the RT/CT node so the switching frequency will not be altered. C21 ac-couples the output of the emitter follower to the CS pin (via R22). AC-coupling the slope compensation is preferred because it eliminates the addition of a DC bias at the CS pin if the slope compensation were directly coupled. The dc bias would effectively reduce the current limit threshold, requiring a smaller sense resistor, smaller current ramp, etc. Lastly, the value of R23 should be much higher than R21 to prevent attenuating the current signal at the CS pin.
R23 (plus R22) form a resistor divider with R21. This resistor divider attenuates the current sense signal at the CS pin. If the current signal at the CS pin is too small the regulator will not be able to reliably produce small pulse width. Figure 4-2 to Figure 4-5 show differential measurements of the Rsense and CS pin voltages for two sets of values for R23.
In the first pair of waveforms, R23 is 1 kΩ and C21 is 10nF. When the MOSFET turns on the CS signal starts from a value below 0 V (‒30 mV), has a much lower slope than Rsense, and peaks at only 140 mV when Rsense is at 400mV (35%). The regulator produces a “somewhat normal” pulse followed by an extremely narrow pulse. When the regulator operates in this manner the light load regulation is not very good. Pulse skipping occurs below 1 A load.
In the second pair of waveforms, R23 is increased to 15 kΩ and C21 to 2.2 µF. When the MOSFET turns on the CS signal starts from ~0V, has almost the same slope as Rsense, and peaks at 140 mV when Rsense is at 240 mV (58%). The regulator consistently produces pulse width of 358 ns and the light load regulation is much better. Pulse skipping does not occur until the load is less than 200 mA.
Inconsistent gate pulse widths |
Consistent gate pulse widths |
CS signal starts below 0 V, slope of CS does not follow Rsense |
CS signal starts at 0 V, slope of the CS follows Rsense |
Figure 4-6 shows load regulation for two sets of R23 and C21 values discussed. The light load regulation with 15 kΩ / 2.2 µF is significantly improved below 1-A load.
The distance between the high-voltage area at the primary side, and low-voltage area at the secondary side, must have enough creepage and clearance to comply with standards such as IEC 60664-1. For creepage design criteria as example, with 800 Vrms working voltage and pollution degree 2, the working voltage for material group I is 4 mm for basic isolation, and 8 mm for reinforce isolation. Therefore, the PCB layout between primary and secondary side and the transformer pin-out needs to follow the guideline.
The ground of the low-voltage side can be connected to a 12-V battery or vehicle chassis, which a user can come in contact with. Therefore, a transformer with reinforced isolation and AEC-Q200 Grade 1 compliance is recommended for this application.
With internal error amplifier and reference, the UCC28C5x family can be configured as a primary-side regulated solution by using an auxiliary winding for feedback, so that it can avoid the need to use optocoupler across isolation and eliminate the CTR degradation from the optocoupler life time issue
When designing a backup power supply for a traction inverter to achieve high converter efficiency, fast startup time, and target thermal de-rating careful consideration must be given to selecting a high voltage power device and topology. The new, ultra-small, low-cost active high voltage depletion mode startup circuit introduced in this document helps achieve fast startup, reduces both PCB area, and component cost. The total startup time with the new startup circuit is very consistent over the entire VIN operating range. The new UVLO options and 30-V rating to reliably drive SiC MOSFET with UC28C5x family enable higher thermal de-rating power and optimal switching performance of the backup power supply in the increasingly popular 800-V battery system of EV traction inverters.
For high voltage power device selection of a flyback converter, silicon MOSFETs are typically acceptable for 400-V battery systems. However, Silicon Carbide MOSFETs must be used in 800-V battery systems due to their higher voltage rating (typically 1700 V) and improved FOM. Also, primary-side regulation (PSR) does not require an optocoupler which increases system reliability, eliminates a component crossing the isolation barrier, and further reduces cost.
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