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  • TMUX-24PW-EVM User's Guide

    • SCDU026 July   2021

       

  • CONTENTS
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  • TMUX-24PW-EVM User's Guide
  1.   Trademarks
  2. 1 Introduction
  3. 2 General Texas Instruments High Voltage Evaluation Module (TI HV EVM) User Safety Guidelines
  4. 3 Information About Cautions and Warnings
  5. 4 Features
  6. 5  TMUX-24PW-EVM Header Connections and Test Points
  7. 6  TMUX-24PW-EVM Setup
  8. 7 Layout
  9. 8 Schematics
  10. 9 Bill of Materials
  11. 10Revision History
  12. IMPORTANT NOTICE
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EVM USER'S GUIDE

TMUX-24PW-EVM User's Guide

Trademarks

All trademarks are the property of their respective owners.

1 Introduction

This user's guide describes the TMUX-24PW-EVM evaluation module (EVM) and its intended use. This board allows for the quick prototyping and DC characterization of TI’s line of TMUX products that use 24-pin TSSOP packages (PW).

GUID-20210707-CA0I-WFRQ-KPKR-698JS8HMXGW2-low.jpg Figure 1-1 TMUX-24PW-EVM Top View
GUID-20210706-CA0I-ZCD3-9WDX-H9MCRVTTFNXL-low.jpg Figure 1-2 TMUX-24PW-EVM Bottom View
GUID-20210706-CA0I-KWFB-NNZQ-Z8Q0PZXL8QHG-low.png Figure 1-3 TMUX-24PW-EVM 3D View

2 General Texas Instruments High Voltage Evaluation Module (TI HV EVM) User Safety Guidelines

GUID-4CFCBD92-E904-4324-B3D8-03A716C1597F-low.gif

Always follow TI’s setup and application instructions, including use of all interface components within their recommended electrical rated voltage and power limits. Always use electrical safety precautions to help ensure your personal safety and those working around you. Contact TI's Product Information Center http://support/ti./com for further information.

Save all warnings and instructions for future reference.

WARNING: Failure to follow warnings and instructions may result in personal injury, property damage or death due to electrical shock and burn hazards.

The term TI HV EVM refers to an electronic product typically provided as an open framed, unenclosed printed circuit board assembly. It is intended strictly for use in development laboratory environments, solely for qualified professional users having training, expertise and knowledge of electrical safety risks in development and application of high voltage electrical circuits. Any other use or application are strictly prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM.

  1. Work Area Safety
    1. Keep work area clean and orderly.
    2. One or more qualified observers must be present anytime circuits are energized.
    3. Effective barriers and signage must be present in the area where the TI HV EVM and its interface electronics are energized, indicating operation of accessible high voltages may be present, for the purpose of protecting inadvertent access.
    4. All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other related apparatus used in a development environment exceeding 50Vrms/75VDC must be electrically located within a protected Emergency Power Off EPO protected power strip.
    5. Use stable and nonconductive work surface.
    6. Use adequately insulated clamps and wires to attach measurement probes and instruments. No freehand testing whenever possible.
  2. Electrical Safety
    As a precautionary measure, it is always a good engineering practice to assume that the entire EVM may have fully accessible and active high voltages.
    1. De-energize the TI HV EVM and all its inputs, outputs and electrical loads before performing any electrical or other diagnostic measurements. Revalidate that TI HV EVM power has been safely de-energized.
    2. With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring, measurement equipment connection, and other application needs, while still assuming the EVM circuit and measuring instruments are electrically live.
    3. After EVM readiness is complete, energize the EVM as intended.
    WARNING: While the EVM is energized, never touch the EVM or its electrical circuits, as they could be at high voltages capable of causing electrical shock hazard.
  3. Personal Safety
    1. Wear personal protective equipment (for example, latex gloves or safety glasses with side shields) or protect EVM in an adequate lucent plastic box with interlocks to protect from accidental touch.

Limitation for safe use:

EVMs are not to be used as all or part of a production unit.

3 Information About Cautions and Warnings

The information in the warning statement is provided for personal protection and the information in the caution statement is provided to protect the equipment from damage. Read each caution and warning statement carefully.

GUID-20210625-CA0I-MZLL-NDSK-X8RTZBBGTDBV-low.png
CAUTION: This EVM contains components that can potentially be damaged by electrostatic discharge. Always transport and store the EVM in its supplied ESD bag when not in use. Handle using an antistatic wristband. Operate on an antistatic work surface. For more information on proper handling, see Electrostatic Discharge (ESD).

4 Features

The TMUX-24PW-EVM has the following features:

  • 3 power supply decoupling capacitors from VDD to GND (3 × 3.3 µF)
  • 1 protection diode pad from VDD to GND available near power supply (6.9 mm × 5.8 mm)
  • 3 power supply decoupling capacitors from VSS to GND (3 × 3.3 μF)
  • 1 protection diode pad from VSS to GND available near power supply (6.9 mm × 5.8 mm)
  • Terminal block power supply connection
  • DUT footprint compatible with 24-pin PW (TSSOP) packages
  • 24 length-matched signal inputs corresponding to the 24 pins of the DUT
  • Selectable connections to VDD, VSS, or GND for each signal input using 2.54 mm shunt
  • Footprints for pull-up and pull-down resistors for each signal input (2 × 0603 footprint on each of 24 signals)
  • Footprints for series resistors for each signal input (2 × 0805 footprint on each of 24 signals)
  • Footprints for decoupling capacitors for each input (1 × 1206 footprint and 1 × 1812 footprint on each of 24 signals)
  • 2 test points for each signal input
  • Multiple GND test point connections around board

5 TMUX-24PW-EVM Header Connections and Test Points

There are 24 headers located around the board with designators J1 through J24. These 3-by-2 headers serve as connections to power planes and to signals of the DUT (U1). Each pin of the DUT has similar header and test point configuration. At four different locations around the board, a legend shows the connections of the pins of the nearby five headers. Figure 5-1 shows a representation of the header associated with pin 3 of U1.

GUID-20210706-CA0I-QKLR-11J1-BL4VZLFT5GCT-low.png Figure 5-1 Header J3 for U1.3

The silkscreen legend represents the connections of the pins of J3. Figure 5-2 shows the pin numbers of this header from this same perspective.

GUID-20210706-CA0I-DJBC-QHVS-6LXTRQMCJJXD-low.png GUID-20210706-CA0I-GDBL-KQKK-THCPBKNRQVPS-low.png Figure 5-2 Pinout of Headers

Table 5-1 also shows the connections.

Table 5-1 Connections by Header Pin Number
Header pin number Connection
1 No connection
2 VDD
3 GND
4 U1
5 GND
6 VSS

For all headers J1 through J24, the connections are the same, but are rotated by a multiple of 90° according to their position on the board. A legend is included for each rotation.

In addition to headers, multiple test points are located around the board. Black test points (TP2 and TP4-TP11) are connected to GND, the red test point (TP1) is connected to VDD, and the green test point (TP3) is connected to VSS. The remaining blue test points (TP12-TP59) are connected along the signal paths of the pins of U1.

GUID-20210706-CA0I-QVWJ-0QR9-F97WBRVQWHSV-low.png Figure 5-3 Test Point Colors

Table 5-2 shows the test point connections.

Table 5-2 Test Point Connections
Designator Connection
TP1 VDD
TP2 GND
TP3 VSS
TP4 GND
TP5 GND
TP6 GND
TP7 GND
TP8 GND
TP9 GND
TP10 GND
TP11 GND
TP12 J1.4
TP13 U1.1
TP14 J2.4
TP15 U1.2
TP16 J3.4
TP17 U1.3
TP18 J4.4
TP19 U1.4
TP20 J5.4
TP21 U1.5
TP22 J6.4
TP23 U1.6
TP24 J7.4
TP25 U1.7
TP26 J8.4
TP27 U1.8
TP28 J9.4
TP29 U1.9
TP30 J10.4
TP31 U1.10
TP32 J11.4
TP33 U1.11
TP34 J12.4
TP35 U1.12
TP36 J13.4
TP37 U1.13
TP38 J14.4
TP39 U1.14
TP40 J15.4
TP41 U1.15
TP42 J16.4
TP43 U1.16
TP44 J17.4
TP45 U1.17
TP46 J18.4
TP47 U1.18
TP48 J19.4
TP49 U1.19
TP50 J20.4
TP51 U1.20
TP52 J21.4
TP53 U1.21
TP54 J22.4
TP55 U1.22
TP56 J23.4
TP57 U1.23
TP58 J24.4
TP59 U1.24

Terminal block J25 is the power input for the board. Three power rails (VSS, GND, and VDD) are labeled on the board’s silkscreen layer, indicating the identities of the input pins of the header. Connect the power supply rails at this terminal block to power the board.

6 TMUX-24PW-EVM Setup

GUID-20210706-CA0I-G6SR-HX7R-JBBDR4WVDR6P-low.pngFigure 6-1 DUT Footprint U1

The TMUX-24PW-EVM will not have any device connected at footprint U1, and there are not any devices included with the EVM for this footprint. Attach any compatible Texas Instruments TMUX device to this location, which will serve as the Device Under Test (DUT). Compatible devices include 24-pin parts with PW package names.

The headers of the TMUX-24PW-EVM can be easily connected to a power rail using 2.54 mm shunts on J1-J24. Connecting the shunt between pin 4 of the header and pin 3 (GND) to connect the corresponding pin of U1 to GND. Alternatively, the pins of U1 can be shorted to VDD or VSS by connecting between pin 4 of the header and pin 2 or pin 6 respectively. Figure 5-2 and Table 5-1 includes detailed descriptions of the connections on J1 through J24.

GUID-20210708-CA0I-7JS3-VPNW-QNTBRTFQPQTV-low.jpgFigure 6-2 Signal Line Circuitry (3D)

As shown in Figure 6-2 and Figure 6-3 as R4 and R16 on the J4 (pin 4 of U1) signal line, the TMUX-24PW-EVM includes 0 Ω series resistors (0805 package) on each signal line.

GUID-20210706-CA0I-QMJF-ZF8W-G98KCGTC09LN-low.pngFigure 6-3 Signal Line Circuitry

These can be substituted for different resistors as desired. Additionally, there are pads for pull-up and pull-down resistors to VDD and GND respectively. Add any 0603 resistor to the footprint shown as R4 to provide pull-up to VDD, and add any 0603 resistor to the footprint shown as R16 to provide pull-down to GND.

Each signal line also includes two footprints that allow for the user to attach capacitors or other devices with matching footprints. On the top side of the board, shown in Figure 6-2 and Figure 6-3 as C14, a standard 1206 footprint exists between the U1 pin signal and the GND signal. The user can solder a capacitor to this footprint to provide capacitance to the signal line.

GUID-20210706-CA0I-4MXS-DFCM-SPG1CG319G5J-low.pngFigure 6-4 Signal Line Circuitry Bottom Layer

On the back side of the board, shown in Figure 6-4 as C10, a standard 1812 footprint exists, also allowing for connection of a capacitor between the U1 pin signal and GND. The user can solder a capacitor to this footprint to provide capacitance to the signal line.

7 Layout

Figure 7-1 shows the layout of the EVM PCB.

GUID-20210712-CA0I-CZHN-LKXX-VWKWKSRWKJTL-low.png Figure 7-1 Illustration of TMUX-24PW-EVM Layout

 

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