ZHCSY68D October   2008  – April 2025 LM5574-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Shutdown and Standby
      2. 6.3.2 Current Limit
      3. 6.3.3 Soft Start
      4. 6.3.4 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 High Voltage Start-Up Regulator
      2. 6.4.2 Oscillator and Sync Capability
      3. 6.4.3 Error Amplifier and PWM Comparator
      4. 6.4.4 Ramp Generator
      5. 6.4.5 Maximum Duty Cycle and Input Dropout Voltage
      6. 6.4.6 Boost Pin
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Bias Power Dissipation Reduction
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1  Custom Design With WEBENCH® Tools
        2. 7.2.2.2  External Components
        3. 7.2.2.3  R3 (RT)
        4. 7.2.2.4  L1- Inductor
        5. 7.2.2.5  C3- Ramp Capacitor
        6. 7.2.2.6  C9 -Output Capacitor
        7. 7.2.2.7  D1 - Async Diode
        8. 7.2.2.8  C1- Input Capacitor
        9. 7.2.2.9  C8 - Vcc Capacitor
        10. 7.2.2.10 C7 - BST Capacitor
        11. 7.2.2.11 C4 - SS Capacitor
        12. 7.2.2.12 R5, R6 - Feedback Resistor
        13. 7.2.2.13 R1, R2, C2 - SD Pin Components
        14. 7.2.2.14 R4, C5, C6 - Compensation Components
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
      3. 7.4.3 Power Dissipation
      4. 7.4.4 Thermal Considerations
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Custom Design With WEBENCH® Tools
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.4.5 Maximum Duty Cycle and Input Dropout Voltage

There is a forced off-time of 500ns implemented each cycle to make sure of sufficient time for the diode current to be sampled. This forced off-time limits the maximum duty cycle of the buck switch. The maximum duty cycle varies with the operating frequency.

Equation 5. DMAX = 1 – Fs × 500ns

where

  • Fs is the oscillator frequency.

Limiting the maximum duty cycle raises the input dropout voltage. The input dropout voltage is the lowest input voltage required to maintain regulation of the output voltage. Use Equation 6 to calculate an approximation of the input dropout voltage.

Equation 6. LM5574-Q1

where

  • VD is the voltage drop across the re-circulatory diode.

Operating at high switching frequency raises the minimum input voltage necessary to maintain regulation.