ZHCSTX5C August   2000  – January 2025 OPA627 , OPA637

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: OPA627
    5. 5.5 Thermal Information: OPA637
    6. 5.6 Electrical Characteristics: OPA627BU, OPA627AU
    7. 5.7 Electrical Characteristics: OPA627AM, OPA627BM, OPA627SM
    8. 5.8 Electrical Characteristics: OPA637
    9. 5.9 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Offset Voltage Adjustment
      2. 6.3.2 Noise Performance
      3. 6.3.3 Input Bias Current
      4. 6.3.4 Phase-Reversal Protection
      5. 6.3.5 Output Overload
      6. 6.3.6 Capacitive Loads
      7. 6.3.7 Input Protection
      8. 6.3.8 EMI Rejection Ratio (EMIRR)
        1. 6.3.8.1 EMIRR IN+ Test Configuration
      9. 6.3.9 Settling Time
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 TINA-TI™ 仿真软件（免费下载）
        2. 8.1.1.2 模拟滤波器设计器
        3. 8.1.1.3 TI 参考设计
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 接收文档更新通知
    4. 8.4 支持资源
    5. 8.5 Trademarks
    6. 8.6 静电放电警告
    7. 8.7 术语表
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.9 Settling Time

The OPA627 and OPA637 have fast settling times, as low as 110ns. Figure 6-10 illustrates the circuit used to measure settling time for the OPA627 and OPA637.

OPA627 OPA637 Settling Time and Slew Rate Test CircuitFigure 6-10 Settling Time and Slew Rate Test Circuit