ZHCSLI7A May 2021 – November 2021 LP5860
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Power supplies | ||||||
| VCC | Device supply voltage | 2.7 | 5.5 | V | ||
| VUVR | Undervoltage restart | VCC rising, Test mode | 2.5 | V | ||
| VUVF | Undervoltage shutdown | VCC falling, Test mode | 1.9 | V | ||
| VUV_HYS | Undervoltage shutdown hysteresis | 0.3 | V | |||
| VCAP | Internal LDO output | VCC = 2.7 V to 5.5 V | 1.78 | V | ||
| ICC | Shutdown supply current ISHUTDOWN | VEN = 0 V, CHIP_EN = 0 (bit), measure the total current from VCC and VLED | 0.1 | 1 | µA | |
| Standby supply current ISTANDBY | VEN = 3.3 V, CHIP_EN = 0 (bit), measure the total current from VCC and VLED | 5.5 | 10 | µA | ||
| Active mode supply current INORMAL | VEN = 3.3 V, CHIP_EN = 1 (bit), all channels IOUT = 5 mA (MC = 1, CC = 127, DC = 256), measure the current from VCC | 4.3 | 6 | mA | ||
| VLED | LED supply voltage | 2.7 | 5.5 | V | ||
| VVIO | VIO supply voltage | 1.65 | 5.5 | V | ||
| IVIO | VIO supply current | Interface idle | 5 | µA | ||
| Output Stages | ||||||
| ICS | Constant current sink output range (CS0 – CS17) | 2.7 <= VCC < 3.3 V, PWM = 100% | 0.1 | 40 | mA | |
| VCC >= 3.3 V PWM = 100% | 0.1 | 50 | mA | |||
| ILKG | Leakage current (CS0 – CS17) | channels off, up_deghost = 0, VCS = 5 V | 0.1 | 1 | µA | |
| IERR_DD | Device to device current error, IERR_DD = (IAVE-ISET)/ISET×100% | All channels ON. Current set to 0.1 mA. MC = 0 CC = 42 DC = 25 PWM = 100% | –7 | 7 | % | |
| All channels ON. Current set to 1 mA. MC = 2 CC = 127 DC = 25 PWM = 100% | –5 | 5 | % | |||
| All channels ON. Current set to 10 mA. MC = 2 CC = 127 DC = 255 PWM = 100% | –3.5 | 3.5 | % | |||
| All channels ON. Current set to 25 mA. MC = 7 CC = 64 DC = 255 PWM=100% | –3.5 | 3.5 | % | |||
| All channels ON. Current set to 50 mA. MC = 7 CC = 127 DC = 255 PWM = 100% | –3 | 3 | % | |||
| IERR_CC | Channel to channel current error, IERR_CC = (IOUTX-IAVE)/IAVE×100% | All channels ON. Current set to 0.1 mA. MC = 0 CC = 42 DC = 25 PWM = 100% | –5.5 | 5.5 | % | |
| All channels ON. Current set to 1 mA. MC = 2 CC = 127 DC = 25 PWM = 100% | –5 | 5 | % | |||
| All channels ON. Current set to 10 mA. MC = 2 CC = 127 DC = 255 PWM = 100% | –4 | 4 | % | |||
| All channels ON. Current set to 25 mA. MC = 7 CC = 64 DC = 255 PWM = 100% | –3.5 | 3.5 | % | |||
| All channels ON. Current set to 50 mA. MC = 7 CC = 127 DC = 255 PWM = 100% | –3 | 3 | % | |||
| fPWM | LED PWM frequency | PWM_Fre = 1, PWM = 100% | 62.5 | KHz | ||
| PWM_Fre = 0, PWM = 100% | 125 | KHz | ||||
| VSAT | Output saturation voltage | IOUT = 50 mA, decreasing output voltage, when the LED current has dropped 5% | 0.45 | V | ||
| IOUT = 30 mA, decreasing output voltage, when the LED current has dropped 5% | 0.4 | V | ||||
| IOUT = 10 mA, decreasing output voltage, when the LED current has dropped 5% | 0.35 | V | ||||
| RSW | High-side PMOS ON resistance | VLED = 2.7 V, ISW = 200 mA | 450 | 550 | mΩ | |
| VLED = 2.7 V, ISW = 200 mA, LP5860MRKPR and LP5864MRSMR | 450 | 570 | mΩ | |||
| VLED = 3.8 V, ISW = 200 mA | 380 | 500 | mΩ | |||
| VLED = 3.8 V, ISW = 200 mA, LP5860MRKPR and LP5864MRSMR | 380 | 520 | mΩ | |||
| VLED = 5 V, ISW = 200 mA | 310 | 450 | mΩ | |||
| VLED = 5V, ISW = 200 mA, LP5860MRKPR and LP5864MRSMR | 310 | 490 | mΩ | |||
| Logic Interfaces | ||||||
| VLOGIC_IL | Low-level input voltage, SDA, SCL, SCLK, MOSI, SS, ADDRx, VSYNC, IFS | 0.3 x VIO | V | |||
| VLOGIC_IH | High-level input voltage, SDA, SCL, SCLK, MOSI, SS, ADDRx, VSYNC, IFS | 0.7 x VIO | V | |||
| VEN_IL | Low-level input voltage of EN | 0.4 | V | |||
| VEN_IH | High-level input voltage of EN | When VCAP powered up | 1.4 | V | ||
| ILOGIC_I | Input current, SDA, SCL, SCLK, MOSI, SS, ADDRx | –1 | 1 | µA | ||
| VLOGIC_OL | Low-level output voltage, SDA, MISO | IPULLUP = 3 mA | 0.4 | V | ||
| VLOGIC_OH | High-level output voltage, MISO | IPULLUP = –3 mA | 0.7 x VIO | V | ||
| Protection Circuits | ||||||
| VLOD_TH | Thershold for channel open detection | 0.25 | V | |||
| VLSD_TH | Thershold for channel short detection | VLED – 1 | V | |||
| TTSD | Thermal-shutdown junction temperature | 150 | °C | |||
| THYS | Thermal shutdown temperature hysteresis | 15 | °C | |||