ZHCSL64D april   2019  – may 2023 TPS7H4001-SP

PRODMIX  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Options Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics - All Devices
    6. 7.6  Electrical Characteristics: CDFP and KGD Options
    7. 7.7  Electrical Characteristics: HTSSOP (SHP) Option
    8. 7.8  Electrical Characteristics: HTSSOP (QMLP) Option
    9. 7.9  Quality Conformance Inspection
    10. 7.10 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 8.3.2  Voltage Reference
      3. 8.3.3  Adjusting the Output Voltage
      4. 8.3.4  Safe Start-Up Into Prebiased Outputs
      5. 8.3.5  Error Amplifier
      6. 8.3.6  Enable and Adjust UVLO
      7. 8.3.7  Adjustable Switching Frequency and Synchronization (SYNC)
        1. 8.3.7.1 Internal Oscillator Mode
        2. 8.3.7.2 External Synchronization Mode
        3. 8.3.7.3 Primary-Secondary Operation Mode
      8. 8.3.8  Soft-Start (SS/TR)
      9. 8.3.9  Power Good (PWRGD)
      10. 8.3.10 Sequencing
      11. 8.3.11 Output Overvoltage Protection (OVP)
      12. 8.3.12 Overcurrent Protection
        1. 8.3.12.1 High-Side MOSFET Overcurrent Protection
        2. 8.3.12.2 Low-Side MOSFET Overcurrent Protection
      13. 8.3.13 Thermal Shutdown
      14. 8.3.14 Turn-On Behavior
      15. 8.3.15 Slope Compensation
        1. 8.3.15.1 Slope Compensation Requirements
      16. 8.3.16 Small Signal Model for Frequency Compensation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Fixed-Frequency PWM Control
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Operating Frequency
        2. 9.2.2.2 Output Inductor Selection
        3. 9.2.2.3 Output Capacitor Selection
        4. 9.2.2.4 Input Capacitor Selection
        5. 9.2.2.5 Soft-Start Capacitor Selection
        6. 9.2.2.6 Undervoltage Lockout (UVLO) Set Point
        7. 9.2.2.7 Output Voltage Feedback Resistor Selection
          1. 9.2.2.7.1 Minimum Output Voltage
        8. 9.2.2.8 Compensation Component Selection
      3. 9.2.3 Parallel Operation
      4. 9.2.4 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 接收文档更新通知
    3. 10.3 支持资源
    4. 10.4 Trademarks
    5. 10.5 静电放电警告
    6. 10.6 术语表
  12. 11Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

GUID-2F8E6DE5-98D9-46EA-B1FC-348FD66534BE-low.gifFigure 6-1 HKY Package
34-Pin CDFP
Top View
GUID-20220518-SS0I-66BH-GPPG-KBVPXWG9GJRL-low.svgFigure 6-2 DDW Package
44-Pin HTSSOP
Top View
Table 6-1 Pin Functions
PIN I/O DESCRIPTION
NAME CDFP HTSSOP
GND 1 1, 2, 10, 35 Return for control circuitry.(1)
EN 2 4 I EN pin is internally pulled up allowing for the pin to be floated to enable the device.
RT 3 5 I/O A resistor connected between RT and GND sets the switching frequency of the converter. The switching frequency range is 100 kHz to 1 MHz. When an external clock is used, RT must be selected such that the set switching frequency coincides with the frequency of the applied clock. Leaving this pin floating sets the internal switching frequency to 500 kHz and SYNC1 and SYNC2 become output clocks at 500 kHz, with SYNC1 aligned with the converter switching and SYNC2 90° out of phase.
VIN 4 6,7 I Input power for the control circuitry of the switching regulator.
SYNC1 5 8 I/O SYNC1 is an input when an external clock is provided. The frequency of the external clock should match the switching frequency that is set by the resistor between RT and GND. With an external clock applied, the converter switching action is 180° out of phase with the external clock. When RT is floating, SYNC1 serves as an output of a 500-kHz clock signal that is in phase with the converter switching action. SYNC1 can be used in combination with SYNC2 in order to connect up to four devices in parallel.
SYNC2 6 9 I/O SYNC2 is used for connecting multiple devices in parallel. For the primary device, with RT floating, SYNC2 outputs 500-kHz signal that is 90° out of phase with the SYNC1 output clock. For the secondary devices, in which RT is populated, SYNC2 is used to configure the phase of the input clock signal on SYNC1. When SYNC2 is connected to VIN, the internal clock of the secondary device is in phase with clock provided at SYNC1. When SYNC2 is connected to GND, the input clock signal at SYNC1 is internally inverted.
PVIN 7-11 11-15 I Input power for the output stage of the switching regulator.
PGND 12-17 16-22 Return for low-side power MOSFET.
PH 18-28 23-34 O Switch phase node.
PWRGD 29 36 O Power Good fault pin. Asserts low if output voltage is low due to thermal shutdown, dropout, overvoltage, or EN shutdown, or during soft-start.
RSC 30 37 I/O A resistor to GND sets the desired slope compensation.
SS/TR 31 38 I/O Soft-start and tracking. An external capacitor connected to this pin sets the internal voltage reference rise time. The voltage on this pin overrides the internal reference. It can be used for tracking and sequencing.
VSENSE 32 39 I Inverting input of the gm error amplifier.
COMP 33 40 I/O Error amplifier output and input to the output switch current comparator. Connect frequency compensation to this pin.
REFCAP 34 41 O Required 470-nF external capacitor for internal reference.
PowerPADTM Yes Used for heat sinking by soldering to GND copper on printed circuit board.
THERMAL PAD 35 Thermal pad internally connected to GND.
PGND PAD 36 Return for low-side power MOSFET. Connect to PGND pins.
PH PAD 37 O Switch phase node. Connect to PH pins.
NC 3, 42-44 No connect. This pin is not internally connected. It is recommended to connect these pins to GND to prevent charge buildup; however, these pins can also be left open or tied to any voltage between GND and VIN.
Thermal pad and package lid are internally connected to GND for CDFP option.
Table 6-2 Bare Die Information
DIE THICKNESS BACKSIDE FINISH BACKSIDE POTENTIAL BOND PAD METALLIZATION COMPOSITION BOND PAD THICKNESS
15 mils Silicon with backgrind GND AlCu 1050 nm
GUID-20201023-CA0I-KQKR-0777-SLWQMFGPXPLM-low.png Figure 6-3 TPS7H4001-SP Bare Die Diagram
Table 6-3 Bond Pad Coordinates in Microns
DESCRIPTION PAD NUMBER X MIN Y MIN X MAX Y MAX
GND 1 958.995 7185.51 1098.945 7325.46
GND 2 806.445 7185.51 946.395 7325.46
N/C 3 653.895 7185.51 793.845 7325.46
GND 4 501.345 7185.51 641.295 7325.46
GND 5 348.795 7185.51 488.745 7325.46
N/C 6 196.245 7185.51 336.195 7325.46
EN 7 64.125 6969.06 204.075 7109.01
RT 8 64.125 6265.53 204.075 6405.48
VIN 9 64.125 6080.445 204.075 6220.395
VIN 10 64.125 5927.895 204.075 6067.845
VIN 11 64.125 5775.345 204.075 5915.295
VIN 12 64.125 5622.795 204.075 5762.745
SYNC1 13 64.125 5119.785 204.075 5259.735
SYNC2 14 68.04 4881.735 207.99 5021.685
PVIN 15 398.475 4299.39 538.425 4439.34
PVIN 16 556.425 4299.39 696.375 4439.34
PVIN 17 714.375 4299.39 854.325 4439.34
PVIN 18 872.325 4299.39 1012.275 4439.34
PVIN 19 398.475 3858.93 538.425 3998.88
PVIN 20 556.425 3858.93 696.375 3998.88
PVIN 21 714.375 3858.93 854.325 3998.88
PVIN 22 872.325 3858.93 1012.275 3998.88
PVIN 23 398.475 3698.73 538.425 3838.68
PVIN 24 556.425 3698.73 696.375 3838.68
PVIN 25 714.375 3698.73 854.325 3838.68
PVIN 26 872.325 3698.73 1012.275 3838.68
PVIN 27 398.475 3259.17 538.425 3399.12
PVIN 28 556.425 3259.17 696.375 3399.12
PVIN 29 714.375 3259.17 854.325 3399.12
PVIN 30 872.325 3259.17 1012.275 3399.12
PVIN 31 398.475 3098.97 538.425 3238.92
PVIN 32 556.425 3098.97 696.375 3238.92
PVIN 33 714.375 3098.97 854.325 3238.92
PVIN 34 872.325 3098.97 1012.275 3238.92
PVIN 35 398.475 2659.41 538.425 2799.36
PVIN 36 556.425 2659.41 696.375 2799.36
PVIN 37 714.375 2659.41 854.325 2799.36
PVIN 38 872.325 2659.41 1012.275 2799.36
PVIN 39 398.475 2499.21 538.425 2639.16
PVIN 40 556.425 2499.21 696.375 2639.16
PVIN 41 714.375 2499.21 854.325 2639.16
PVIN 42 872.325 2499.21 1012.275 2639.16
PGND 43 270.855 1643.76 410.805 1783.71
PGND 44 428.805 1643.76 568.755 1783.71
PGND 45 586.755 1643.76 726.705 1783.71
PGND 46 744.705 1643.76 884.655 1783.71
PGND 47 902.655 1643.76 1042.605 1783.71
PGND 48 270.855 1492.65 410.805 1632.6
PGND 49 428.805 1492.65 568.755 1632.6
PGND 50 586.755 1492.65 726.705 1632.6
PGND 51 744.705 1492.65 884.655 1632.6
PGND 52 902.655 1492.65 1042.605 1632.6
PGND 53 270.855 1023.66 410.805 1163.61
PGND 54 428.805 1023.66 568.755 1163.61
PGND 55 586.755 1023.66 726.705 1163.61
PGND 56 744.705 1023.66 884.655 1163.61
PGND 57 902.655 1023.66 1042.605 1163.61
PGND 58 270.855 872.55 410.805 1012.5
PGND 59 428.805 872.55 568.755 1012.5
PGND 60 586.755 872.55 726.705 1012.5
PGND 61 744.705 872.55 884.655 1012.5
PGND 62 270.855 403.56 410.805 543.51
PGND 63 428.805 252.45 568.755 392.4
PGND 64 428.805 403.56 568.755 543.51
PGND 65 586.755 252.45 726.705 392.4
PGND 66 586.755 403.56 726.705 543.51
PGND 67 744.705 252.45 884.655 392.4
PGND 68 744.705 403.56 884.655 543.51
PGND 69 902.655 252.45 1042.605 392.4
PGND 70 902.655 403.56 1042.605 543.51
PGND 71 902.655 872.55 1042.605 1012.5
PH 72 1243.125 106.02 1383.075 245.97
PH 73 1243.125 543.69 1383.075 683.64
PH 74 1243.125 732.42 1383.075 872.37
PH 75 1401.075 106.02 1541.025 245.97
PH 76 1401.075 543.69 1541.025 683.64
PH 77 1559.025 106.02 1698.975 245.97
PH 78 1716.975 106.02 1856.925 245.97
PH 79 1874.925 543.69 2014.875 683.64
PH 80 1716.975 543.69 1856.925 683.64
PH 81 1559.025 543.69 1698.975 683.64
PH 82 1874.925 732.42 2014.875 872.37
PH 83 1716.975 732.42 1856.925 872.37
PH 84 1559.025 732.42 1698.975 872.37
PH 85 1401.075 732.42 1541.025 872.37
PH 86 1874.925 1163.79 2014.875 1303.74
PH 87 1716.975 1163.79 1856.925 1303.74
PH 88 1559.025 1163.79 1698.975 1303.74
PH 89 1401.075 1163.79 1541.025 1303.74
PH 90 1243.125 1163.79 1383.075 1303.74
PH 91 1874.925 1352.52 2014.875 1492.47
PH 92 1716.975 1352.52 1856.925 1492.47
PH 93 1559.025 1352.52 1698.975 1492.47
PH 94 1401.075 1352.52 1541.025 1492.47
PH 95 1243.125 1352.52 1383.075 1492.47
PH 96 1874.925 1786.68 2014.875 1926.63
PH 97 1716.975 1786.68 1856.925 1926.63
PH 98 1559.025 1786.68 1698.975 1926.63
PH 99 1401.075 1786.68 1541.025 1926.63
PH 100 1243.125 1786.68 1383.075 1926.63
PH 101 1839.915 2356.245 1979.865 2496.195
PH 102 1681.965 2356.245 1821.915 2496.195
PH 103 1524.015 2356.245 1663.965 2496.195
PH 104 1366.065 2356.245 1506.015 2496.195
PH 105 1839.915 2802.375 1979.865 2942.325
PH 106 1681.965 2802.375 1821.915 2942.325
PH 107 1524.015 2802.375 1663.965 2942.325
PH 108 1366.065 2802.375 1506.015 2942.325
PH 109 1839.915 2956.005 1979.865 3095.955
PH 110 1681.965 2956.005 1821.915 3095.955
PH 111 1524.015 2956.005 1663.965 3095.955
PH 112 1366.065 2956.005 1506.015 3095.955
PH 113 1839.915 3402.135 1979.865 3542.085
PH 114 1681.965 3402.135 1821.915 3542.085
PH 115 1524.015 3402.135 1663.965 3542.085
PH 116 1366.065 3402.135 1506.015 3542.085
PH 117 1839.915 3555.765 1979.865 3695.715
PH 118 1681.965 3555.765 1821.915 3695.715
PH 119 1524.015 3555.765 1663.965 3695.715
PH 120 1366.065 3555.765 1506.015 3695.715
PH 121 1839.915 4001.895 1979.865 4141.845
PH 122 1681.965 4001.895 1821.915 4141.845
PH 123 1524.015 4001.895 1663.965 4141.845
PH 124 1366.065 4001.895 1506.015 4141.845
PH 125 1839.915 4155.525 1979.865 4295.475
PH 126 1681.965 4155.525 1821.915 4295.475
PH 127 1524.015 4155.525 1663.965 4295.475
PH 128 1366.065 4155.525 1506.015 4295.475
PWRGD 129 1954.305 5335.605 2094.255 5475.555
RSC 130 1954.305 5533.56 2094.255 5673.51
SS/TR 131 1954.305 5731.515 2094.255 5871.465
VSENSE 132 1954.305 5910.615 2094.255 6050.565
COMP 133 1954.305 6116.715 2094.255 6256.665
REFCAP 134 1954.305 6948.45 2094.255 7088.4