ZHCSK12A July 2019 – October 2019 TLV320ADC6140
PRODUCTION DATA.
This register is the interrupt masks register 0.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
INT_MASK0[7] | INT_MASK0[6] | Reserved | |||||
R/W-1h | R/W-1h | R/W-3Fh |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | INT_MASK0[7] | R/W | 1h | ASI clock error mask.
0b = Do not mask 1b = Mask |
6 | INT_MASK0[6] | R/W | 1h | PLL lock interrupt mask.
0b = Do not mask 1b = Mask |
5-0 | Reserved | R/W | 3Fh | Reserved |