ZHCSHS1D May   2017  – December 2021 AWR1243

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Functional Block Diagram
  5. Revision History
  6. Device Comparison
    1. 6.1 Related Products
  7. Terminal Configuration and Functions
    1. 7.1 Pin Diagram
    2. 7.2 Signal Descriptions
      1. 7.2.1 Signal Descriptions
  8. Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Power-On Hours (POH)
    4. 8.4 Recommended Operating Conditions
    5. 8.5 Power Supply Specifications
    6. 8.6 Power Consumption Summary
    7. 8.7 RF Specification
    8. 8.8 Thermal Resistance Characteristics for FCBGA Package [ABL0161]
    9. 8.9 Timing and Switching Characteristics
      1. 8.9.1 Power Supply Sequencing and Reset Timing
      2. 8.9.2 Synchronized Frame Triggering
      3. 8.9.3 Input Clocks and Oscillators
        1. 8.9.3.1 Clock Specifications
      4. 8.9.4 Multibuffered / Standard Serial Peripheral Interface (MibSPI)
        1. 8.9.4.1 Peripheral Description
          1. 8.9.4.1.1 SPI Timing Conditions
          2. 8.9.4.1.2 SPI Peripheral Mode Switching Parameters (SPICLK = input, SPISIMO = input, and SPISOMI = output)
          3. 8.9.4.1.3 SPI Peripheral Mode Timing Requirements (SPICLK = input, SPISIMO = input, and SPISOMI = output)
        2. 8.9.4.2 Typical Interface Protocol Diagram (Peripheral Mode)
      5. 8.9.5 LVDS Interface Configuration
        1. 8.9.5.1 LVDS Interface Timings
      6. 8.9.6 General-Purpose Input/Output
        1. 8.9.6.1 Switching Characteristics for Output Timing versus Load Capacitance (CL)
      7. 8.9.7 Camera Serial Interface (CSI)
        1. 8.9.7.1 CSI Switching Characteristics
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Subsystems
      1. 9.3.1 RF and Analog Subsystem
        1. 9.3.1.1 Clock Subsystem
        2. 9.3.1.2 Transmit Subsystem
        3. 9.3.1.3 Receive Subsystem
      2. 9.3.2 Host Interface
    4. 9.4 Other Subsystems
      1. 9.4.1 ADC Data Format Over CSI2 Interface
  10. 10Monitoring and Diagnostics
    1. 10.1 Monitoring and Diagnostic Mechanisms
  11. 11Applications, Implementation, and Layout
    1. 11.1 Application Information
    2. 11.2 Short-, Medium-, and Long-Range Radar
    3. 11.3 Reference Schematic
  12. 12Device and Documentation Support
    1. 12.1 Device Nomenclature
    2. 12.2 Tools and Software
    3. 12.3 Documentation Support
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 术语表
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Packaging Information
    2. 13.2 Tray Information for

说明

AWR1243 器件是一款能够在 76 至 81GHz 频带内运行的集成式单芯片 FMCW 收发器。该器件在极小的封装中实现了出色的集成度。AWR1243 是适用于汽车领域中的低功耗、自监控、超精确雷达系统的理想解决方案。

AWR1243 器件是一种自包含 FMCW 收发器单芯片解决方案,能够简化 76 至 81GHz 频带中的汽车雷达传感器实施。它基于 TI 的低功耗 45nm RFCMOS 工艺构建,从而实现了一个具有内置 PLL 和 ADC 转换器的单片实施 3TX、4RX 系统。简单编程模型更改可支持各种传感器实施(近距离、中距离和远距离),并且能够进行动态重新配置,从而实现多模式传感器。此外,该器件作为完整的平台解决方案进行提供,其中包括 TI 参考设计、软件驱动程序、示例配置、API 指南以及用户文档。

器件信息
器件型号(2) 封装(1) 封装尺寸 托盘/卷带包装
AWR1243FBIGABLQ1 FCBGA (161) 10.4mm × 10.4mm 托盘
AWR1243FBIGABLRQ1 卷带包装
如需更多信息,请参阅Section 13机械、封装和可订购信息
如需更多信息,请参阅Section 12.1器件命名规则