ZHCSH62B
December 2017 – October 2019
LM76002-Q1
,
LM76003-Q1
PRODUCTION DATA.
1
特性
2
应用
3
说明
简化原理图
效率与输出电流(VOUT = 5V,fSW = 400kHz,自动模式)
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Characteristics
6.7
Switching Characteristics
6.8
System Characteristics
6.9
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Fixed-Frequency, Peak-Current-Mode Control
7.3.2
Light Load Operation Modes — PFM and FPWM
7.3.3
Adjustable Output Voltage
7.3.4
Enable (EN Pin) and UVLO
7.3.5
Internal LDO, VCC UVLO, and Bias Input
7.3.6
Soft Start and Voltage Tracking (SS/TRK)
7.3.7
Adjustable Switching Frequency (RT) and Frequency Synchronization
7.3.8
Minimum On-Time, Minimum Off-Time, and Frequency Foldback at Dropout Conditions
7.3.9
Internal Compensation and CFF
7.3.10
Bootstrap Voltage and VBOOT UVLO (BOOT Pin)
7.3.11
Power Good and Overvoltage Protection (PGOOD)
7.3.12
Overcurrent and Short-Circuit Protection
7.3.13
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Standby Mode
7.4.3
Active Mode
7.4.4
CCM Mode
7.4.5
DCM Mode
7.4.6
Light Load Mode
7.4.7
Foldback Mode
7.4.8
Forced Pulse-Width-Modulation Mode
7.4.9
Self-Bias Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Custom Design With WEBENCH® Tools
8.2.2.2
Output Voltage Setpoint
8.2.2.3
Switching Frequency
8.2.2.4
Input Capacitors
8.2.2.5
Inductor Selection
8.2.2.6
Output Capacitor Selection
8.2.2.7
Feed-Forward Capacitor
8.2.2.8
Bootstrap Capacitors
8.2.2.9
VCC Capacitors
8.2.2.10
BIAS Capacitors
8.2.2.11
Soft-Start Capacitors
8.2.2.12
Undervoltage Lockout Setpoint
8.2.2.13
PGOOD
8.2.2.14
Synchronization
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Layout Highlights
10.1.2
Compact Layout for EMI Reduction
10.1.3
Ground Plane and Thermal Considerations
10.1.4
Feedback Resistors
10.2
Layout Example
10.3
Thermal Design
11
器件和文档支持
11.1
器件支持
11.1.1
开发支持
11.1.1.1
使用 WEBENCH® 工具创建定制设计
11.2
接收文档更新通知
11.3
支持资源
11.4
商标
11.5
静电放电警告
11.6
Glossary
12
机械、封装和可订购信息
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
±2000
V
Charged-device model (CDM), per AEC Q100-011
±750
V
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.