FDC1004 适用于电容式感应应用的 4 通道电容数字转换器
- ZHCSCQ6C August 2014 – October 2024 FDC1004
  
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FDC1004 适用于电容式感应应用的 4 通道电容数字转换器

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1 特性

输入范围：±15pF
测量分辨率：0.5fF
最大偏移电容：100pF
可编程输出速率：100/200/400S/s
最大屏蔽负载：400pF
电源电压：3.3V
温度范围：–40° 至 125°C
电流消耗：
- 有效：750µA
- 待机：29µA
接口：I²C
通道数量：4

2 应用

接近传感器
手势识别
汽车车门/脚踢传感器
汽车雨滴传感器
远程和直接液位传感器
高分辨率金属分析
雨/雾/冰/雪传感器
材料尺寸检测
材料堆叠高度

3 说明

采用接地电容传感器的电容式感应是一种具有超低功耗、低成本和高分辨率的非接触式感应技术，适用于接近感应、手势识别、材料分析和远程液位感应等各类应用。电容式感应系统中的传感器可以采用任意金属或导体，因此可实现高度灵活的低成本系统设计。

FDC1004 是一款高分辨率、4 通道电容数字转换器，用于实现电容式感应解决方案。每个通道的满量程范围均为 ±15pF，可处理高达 100pF 的传感器偏移电容，该偏移电容既可以在内部编程，也可以是一个外部电容，用于跟踪环境随时间和温度的变化。凭借高偏移电容，可以使用远程传感器。

此外，FDC1004 还包含用于实现传感器屏蔽的屏蔽驱动器，不但可降低电磁干扰 (EMI)，而且有助于聚焦电容传感器的感应方向。FDC1004 外形小巧，非常适合空间受限类应用。FDC1004 采用 10 引脚 WSON 和 VSSOP 封装，并且具有一个用于连接 MCU 的 I²C 接口。

封装信息

器件型号	封装⁽¹⁾	封装尺寸⁽²⁾
FDC1004	DSC（WSON，10）	3mm × 3mm
FDC1004	DGS（VSSOP，10）	3mm × 4.9mm

(1) 有关所有可用封装，请参阅节 10。

(2) 封装尺寸（长 × 宽）为标称值，并包括引脚（如适用）。

典型应用

4 Pin Configuration and Functions

Figure 4-1 WSON (DSC)10 PinsTOP

Figure 4-2 VSSOP (DGS)10 PinsTOP

Table 4-1 Pin Functions

PIN		TYPE⁽¹⁾	DESCRIPTION
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION
SHLD1	1	A	Capacitive Input Active AC Shielding.
CIN1	2	A	Capacitive Input. The measured capacitance is connected between the CIN1 pin and GND. If not used, leave this pin as an open circuit.
CIN2	3	A	Capacitive Input. The measured capacitance is connected between the CIN2 pin and GND. If not used, leave this pin as an open circuit.
CIN3	4	A	Capacitive Input. The measured capacitance is connected between the CIN3 pin and GND. If not used, leave this pin as an open circuit.
CIN4	5	A	Capacitive Input. The measured capacitance is connected between the CIN4 pin and GND. If not used, leave this pin as an open circuit.
SHLD2	6	A	Capacitive Input Active AC Shielding.
GND	7	G	Ground
VDD	8	P	Power Supply Voltage. Decouple this pin to GND, using a low impedance capacitor, for example in combination with a 1μF tantalum and a 0.1μF multilayer ceramic.
SCL	9	I	Serial Interface Clock Input. Connects to the controller clock line. Requires pullup resistor if not already provided elsewhere in the system.
SDA	10	I/O	Serial Interface Bidirectional Data. Connects to the controller data line. Requires a pullup resistor if not provided elsewhere in the system.
DAP⁽²⁾	-	N/A	Connect to GND

(1) P=Power, G=Ground, I=Input, O=Output, A=Analog, I/O=Bidirectional Input/Output

(2) There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the GND pin of the device. Although the DAP can be left floating, for best performance the DAP should be connected to the same potential as the device's GND pin. Do not use the DAP as the primary ground for the device. The device GND pin must always be connected to ground.

5 Specifications

5.1 Absolute Maximum Ratings

See ⁽¹⁾

		MIN	MAX	UNIT
Input voltage	VDD	–0.3	6	V
	SCL, SDA	–0.3	6	V
	at any other pin	–0.3	VDD+0.3	V
Input current	at any pin		3	mA
Junction temperature⁽²⁾			150	°C
Storage temperature	T_STG	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The maximum power dissipation is a function of T_J(MAX), R_θJA, and the ambient temperature, T_A. The maximum allowable power dissipation at any ambient temperature is P_DMAX = (T_J(MAX) - T_A)/ R_θJA. All numbers apply for packages soldered directly onto a PC board.

5.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge⁽¹⁾	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽²⁾	±1000	V
V_(ESD)	Electrostatic discharge⁽¹⁾	Charged device model (CDM), per JEDEC specification -500 500 JESD22-C101, all pins⁽³⁾	±250	V

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in to the device.

(2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.

(3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.

5.3 Recommended Operating Conditions

Over operating temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
Supply voltage (VDD-GND)		3	3.3	3.6	V
Temperature		–40		125	°C

5.4 Thermal Information

THERMAL METRIC⁽¹⁾		FDC1004		UNIT
		WSON (DSC)	VSSOP (DGS)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance	46.8	46.8	°C/W
R_θJC	Junction-to-case(top) thermal resistance	46.7	48.7	°C/W
R_θJB	Junction-to-board thermal resistance	21.5	70.6	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application note.

5.5 Electrical Characteristics

Over recommended operating temperature range, V_DD = 3.3V, for T_A = 25°C (unless otherwise noted).⁽¹⁾

PARAMETER		TEST CONDITION	TYP⁽³⁾	MAX⁽²⁾	UNIT
POWER SUPPLY
I_DD	Supply current	Conversion mode; Digital input to VDD or GND	750	950	µA
I_DD	Supply current	Standby; Digital input to VDD or GND	29	70	µA
CAPACITIVE INPUT
ICR	Input conversion range		±15		pF
C_OMAX	Max input offset capacitance	per channel, Series resistance at CINn n=1.4 = 0 Ω	100		pF
RES	Effective resolution ⁽⁴⁾	Sample rate = 100S/s ⁽⁵⁾	16		bit
EON	Output noise	Sample rate = 100S/s ⁽⁵⁾	33.2		aF/√Hz
ERR	Absolute error	after offset calibration	±6		fF
TcC_OFF	Offset deviation over temperature	-40°C < T < 125°C	46		fF
G_ERR	Gain error		0.2		%
tcG	Gain drift vs temperature	-40°C < T < 125°C	-37.5		ppm/°C
PSRR	DC power supply rejection	3V < V_DD < 3.6V, single-ended mode (channel vs GND)	13.6		fF/V
CAPDAC
FR_CAPDAC	Full-scale range		96.9		pF
TcCOFF_CAPDAC	Offset drift vs. temperature	-40°C < T < 125°C	30		fF
EXCITATION
ƒ	Frequency		25		kHz
V_AC	AC voltage across capacitance		2.4		Vpp
V_DC	Average DC voltage across capacitance		1.2		V
SHIELD
DRV	Driver capability	ƒ = 25kHz, SHLDn to GND, n = 1,2		400	pF

(1) Electrical Characteristics Table values apply only for factory testing conditions at the temperature indicated. Factor testing conditions result in very limited self-heating of the device such that TJ=TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ>TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the device can be permanently degraded, either mechanically or electrically.

(2) Limits are ensured by testing, design, or statistical analysis at 25Degree C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method.

(3) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values can vary over time and also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material.

(4) Effective resolution is the ratio of converter full scale range to RMS measurement noise.

(5) No external capacitance connected.

5.6 I²C Interface Voltage Level

Over recommended operating free-air temperature range, V_DD = 3.3V, for T_A = T_J = 25°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	MAX	UNIT
V_IH	Input high voltage		0.7*V_DD		V
V_IL	Input low voltage			0.3*V_DD	V
V_OL	Output low voltage	Sink current 3 mA		0.4	V
HYS	Hysteresis ⁽¹⁾		0.1*V_DD		V

(1) This parameter is specified by design and/or characterization and is not tested in production.

5.7 I²C Interface Timing

Over recommended operating free-air temperature range, V_DD = 3.3V, for T_A = T_J = 25°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	MAX	UNIT
f_SCL	Clock frequency⁽¹⁾		10	400	kHz
t_LOW	Clock low time⁽¹⁾		1.3		µs
t_HIGH	Clock high time⁽¹⁾		0.6		µs
t_HD;STA	Hold time (repeated) START condition⁽¹⁾	After this period, the first clock pulse is generated	0.6		µs
t_SU;STA	Set-up time for a repeated START condition⁽¹⁾		0.6		µs
t_HD;DAT	Data hold time⁽¹⁾⁽²⁾		0		ns
t_SU;DAT	Data setup time⁽¹⁾		100		ns
t_f	SDA fall time⁽¹⁾	IL ≤ 3mA; CL ≤ 400pF		300	ns
t_SU;STO	Set-up time for STOP condition⁽¹⁾		0.6		µs
t_BUF	Bus free time between a STOP and START condition⁽¹⁾		1.3		µs
t_VD;DAT	Data valid time⁽¹⁾			0.9	ns
t_VD;ACK	Data valid acknowledge time⁽¹⁾			0.9	ns
t_SP	Pulse width of spikes that must be suppressed by the input filter⁽¹⁾			50	ns

(1) This parameter is specified by design and/or characterization and is not tested in production.

(2) The FDC1004 provides an internal 300ns minimum hold time to bridge the undefined region of the falling edge of SCL.

Figure 5-1 I²C Timing

5.8 Typical Characteristics

FDC1004 Active Conversion Mode
Supply Current vs Temperature

Figure 5-2 Active Conversion Mode Supply Current vs Temperature

Figure 5-4 Gain Drift vs Temperature

Capacitance Value = 10pF

Figure 5-6 Capacitance vs Voltage

Figure 5-8 Frequency Response 200S/s

FDC1004 Stand-by Mode Supply
Current vs Temperature

Figure 5-3 Stand-by Mode Supply Current vs Temperature

CINn = open, where n = 1...4

Figure 5-5 Offset Drift vs Temperature

Figure 5-7 Frequency Response 100S/s

Figure 5-9 Frequency Response 400S/s

6 Detailed Description

6.1 Overview

The FDC1004 is a high-resolution, 4-channel capacitance-to-digital converter for implementing capacitive sensing solutions. Each channel has a full scale range of ±15pF and can handle a sensor offset capacitance of up to 100pF, which can be either programmed internally or can be an external capacitor for tracking environmental changes over time and temperature. The large offset capacitance capability allows for the use of remote sensors. The FDC1004 also includes shield drivers for sensor shields, which can reduce EMI interference and help focus the sensing direction of a capacitive sensor. The small footprint of the FDC1004 allows for use in space-constrained applications. For more information on the basics of capacitive sensing and applications, refer to the FDC1004: Basics of Capacitive Sensing and Applications application note.