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TPS65131-Q1 器件作为双输出直流/直流转换器,可产生高达 15V 的正输出电压和低至 -15V 的负输出电压,输出电流通常为 200mA,具体值取决于输入电压与输出电压比。凭借高达 85% 的总体效率,此器件非常适合于便携式电池供电类设备。输入电压范围为 2.7V 至 5.5V,因此允许诸如 3.3V 和 5V 的电压轨为 TPS65131-Q1 器件供电。TPS65131-Q1 器件采用具有散热焊盘和可湿性侧面的 QFN-24 封装。由于只需少量较小的外部组件,因此总体解决方案尺寸可以非常小。
此转换器采用定频 PWM 控制拓扑运行,而且在启用省电模式后,它在轻负载电流的情况下使用脉冲跳跃模式。在运行时,典型的总体器件静态电流只有 500µA。在关断状态下,器件一般消耗 0.2µA。独立使能引脚可实现针对两个输出的加电和断电排序。为了尽可能地实现故障情况下的高可靠性,此器件有一个内部电流限制、过压保护和热关断。
TPS65131-Q1 器件符合汽车应用标准(根据 AEC-Q100 温度等级 2)。该器件在 –40°C 至 125°C 的器件结温范围内接受了电气特性测试。此外,该器件还具有最低关断电流、小巧的解决方案尺寸、带散热焊盘的封装以及良好的效率和保护特性,专为汽车和工业应用而设计。
器件型号 | 封装 | 本体尺寸(标称值) |
---|---|---|
TPS65131-Q1 | VQFN (24) | 4mm × 4mm |
Part Number | Package | Wettable Flanks |
---|---|---|
TPS65131TRGERQ1 | VQFN (24) | No |
TPS65131WTRGERQ1 | VQFN (24) | Yes |
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Figure 5-1 24-pin VQFN Bottom View
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Figure 5-2 24-pin VQFN
Top View
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PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AGND | 19 | — | Analog ground pin |
BSW | 7 | O | Gate-control pin for external battery switch. This pin goes low when ENP is set high. |
CN | 18 | I/O | Compensation pin for inverting converter control |
CP | 21 | I/O | Compensation pin for boost converter control |
ENN | 10 | I | Enable pin for the negative-output voltage (0V: disabled, VIN: enabled) |
ENP | 8 | I | Enable pin for the positive-output voltage (0V: disabled, VIN: enabled) |
FBN | 16 | I | Feedback pin for the negative-output voltage divider |
FBP | 22 | I | Feedback pin for the positive-output voltage divider |
INN | 5, 6 | O | Inverting converter switch pin |
INP | 1, 24 | O | Boost converter switch pin |
NC(1) | 12, 20 | — | Not connected |
OUTN | 13, 14 | I/O | Inverting converter switch output |
PGND | 2, 3 | — | Power ground pin |
PSN | 11 | I | Power-save mode enable for inverter stage (0V: disabled, VIN: enabled) |
PSP | 9 | I | Power-save mode enable for boost converter stage (0V: disabled, VIN: enabled) |
VIN | 4 | I | Control supply input |
VNEG | 15 | I | Negative-output voltage-sense input |
VPOS | 23 | I | Positive-output voltage-sense input |
VREF | 17 | O | Reference output voltage. Bypass this pin with a 220nF capacitor to ground. Connect the lower resistor of the negative-output voltage divider to this pin. |
Thermal pad | Thermal pad for thermal performance, connect to PGND |
VALUE | UNIT | |||
---|---|---|---|---|
MIN | MAX | |||
Input voltage range at pins VIN, INN (2) | –0.3 | 6 | V | |
Voltage at pin VPOS (2) | –0.3 | 17 | V | |
Voltage at pin VNEG (2) | –17 | V(VIN) + 0.3 | V | |
Voltage at pins ENN, ENP, FBP, FBN, CN, CP, PSP, PSN, BSW (2) | –0.3 | V(VIN) + 0.3 | V | |
Input voltage at pin INP (2) | –0.3 | 17 | V | |
Differential voltage between pins OUTN to INN (2) | –0.3 | 24 | V | |
Thermal pad(2) | –0.3 | 0.3 | V | |
TJ | Operating junction temperature | –40 | 150 | °C |
Tstg | Storage temperature range | –65 | 150 | °C |
VALUE | UNIT | |||||
---|---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per AEC Q100-002(1) | ±1000 | V | ||
Charged device model (CDM), per AEC Q100-011 | ±750 | V |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VI , V(VIN), V(INN) | Application input voltage range, input voltage range at VIN and INN pins | 2.7 | 5.5 | V |
VPOS | Adjustable output voltage range for the boost converter | VI + 0.5 | 15 | V |
VNEG | Adjustable output voltage range for the inverting converter | –15 | –2 | V |
V(ENN), V(ENP) | Enable signals voltage | 0 | 5.5 | V |
V(PSN), V(PSP) | Power-save mode enable signals voltage | 0 | 5.5 | V |
TA | Operating free-air temperature range(1) | –40 | 105 | °C |
TJ | Operating junction temperature range | –40 | 125 | °C |