ZHCAFU0 October 2025 TDA4VM
void underflow_exception(void)
{
__HWA_CONFIG_REG_v1 mma_config_reg;
mma_config_reg = __gen_HWA_CONFIG_REG_v1();
__HWA_OFFSET_REG offset_reg;
offset_reg = __gen_HWA_OFFSET_REG();
__HWAOPEN(mma_config_reg,offset_reg,__MMA_OPEN_FSM_RESET);
__HWAADV();
__HWAADV();
__HWAXFER(__MMA_XFER_SRC_HWA_STATUS);
__HWAADV();
__HWAADV();
__HWAADV();
__HWAADV();
__HWARCV(0);
__HWARCV(0);
}