SPRUJ81 February   2023 AM62A3 , AM62A3-Q1 , AM62A7 , AM62A7-Q1

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Width/Spacing Proposal for Escapes
  4. 3 Stackup
  5. 4 Via Sharing
  6. 5 Floorplan Component Placement
  7. 6 Critical Interfaces Impact Placement
  8. 7 Routing Priority
  9. 8 SerDes Interfaces
  10. 9 DDR Interfaces
  11. 10Power Decoupling
  12. 11Route Lowest Priority Interfaces Last
  13. 12Summary

2 Width/Spacing Proposal for Escapes

The AM62Ax has been designed to support the following. The AM62Ax package supports a similar feature set as several other competing solutions with smaller package area and wider line width. This solution reduces PCB foot print and utilizes lower cost PCB rules, enabling compact and low-cost systems.

Table 2-1 Width/Spacing Proposal for Escapes
PCB Feature PCB Routing Requirements Comments
Minimum via diameter 18 mils

Via pads dia - 18 Mils

Via hole dia - 8 Mils
Via hole size 8 mils
Minimum trace width/spacing required in the BGA breakout (Inner Layer)

Trace width – 3.5 mils

Spacing – 3.49 mils
Minimum trace width/spacing required in the BGA breakout (External Layer)

Trace width – 3.5 mils

Spacing – 4 mils
Number of layers used for escape 8

• Top (1 Layer)

• Signal (3 Layer)

• Power (3 Layer)

• Bottom (1 Layer)
BGA land pad size 18 mils
Package Size 18 mm x 18 mm
PCB layers (signal routing, total) recommended

• Top (1 Layer)

• Signal (3 Layers)

• Power (3 Layers)

• Ground (4 Layers)

• Bottom (1 Layer)