SNVSA52E August   2014  – September 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flash Mode
      2. 8.3.2 Torch Mode
      3. 8.3.3 IR Mode
    4. 8.4 Device Functioning Modes
      1. 8.4.1 Start-Up (Enabling The Device)
      2. 8.4.2 Pass Mode
      3. 8.4.3 Power Amplifier Synchronization (TX)
      4. 8.4.4 Input Voltage Flash Monitor (IVFM)
      5. 8.4.5 Fault/Protections
        1. 8.4.5.1 Fault Operation
        2. 8.4.5.2 Flash Time-Out
        3. 8.4.5.3 Overvoltage Protection (OVP)
        4. 8.4.5.4 Current Limit
        5. 8.4.5.5 NTC Thermistor Input (Torch/Temp)
        6. 8.4.5.6 Undervoltage Lockout (UVLO)
        7. 8.4.5.7 Thermal Shutdown (TSD)
        8. 8.4.5.8 LED and/or VOUT Short Fault
    5. 8.5 Programming
      1. 8.5.1 Control Truth Table
      2. 8.5.2 I2C-Compatible Interface
        1. 8.5.2.1 Data Validity
        2. 8.5.2.2 Start and Stop Conditions
        3. 8.5.2.3 Transferring Data
        4. 8.5.2.4 I2C-Compatible Chip Address
    6. 8.6 Register Descriptions
      1. 8.6.1  Enable Register (0x01)
      2. 8.6.2  IVFM Register (0x02)
      3. 8.6.3  LED1 Flash Brightness Register (0x03)
      4. 8.6.4  LED2 Flash Brightness Register (0x04)
      5. 8.6.5  LED1 Torch Brightness Register (0x05)
      6. 8.6.6  LED2 Torch Brightness Register (0x06)
      7. 8.6.7  Boost Configuration Register (0x07)
      8. 8.6.8  Timing Configuration Register (0x08)
      9. 8.6.9  TEMP Register (0x09)
      10. 8.6.10 Flags1 Register (0x0A)
      11. 8.6.11 Flags2 Register (0x0B)
      12. 8.6.12 Device ID Register (0x0C)
      13. 8.6.13 Last Flash Register (0x0D)
  9. Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Capacitor Selection
        2. 9.2.2.2 Input Capacitor Selection
        3. 9.2.2.3 Inductor Selection
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Documentation
      1. 12.2.1 Related Links
      2. 12.2.2 Receiving Notification of Documentation Updates
      3. 12.2.3 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.